Marvel Group Integrated Controller 88F6281 - Manual (Page 87)

Electrical Specifications
AC Electrical Specifications
Copyright © 2008 Marvell Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary Document Classification: Proprietary Information Page 87
Notes:
1. Slew rate is defined from 20% to 80% of the reference clock signal.
2. For additional information regarding configuring this clock, see the Serial Memory Interface
Control Register in the
88F6180, 88F6190, 88F6192, and 88F6281 Functional Specifications.
3. F
s
is the audio sample rate, which can be configured to 44.1 kHz, 48 kHz, or 96 kHz (see the
Audio (I
2
S / S/PDIF) Interface section in the 88F6180, 88F6190, 88F6192, and 88F6281
Functional Specifications).
4. The RTC design was optimized for a standard CL = 12.5 pF crystal. No passive components
are provided internally. Connect the crystal and the passive network as recommended by the
crystal manufacturer.
5. The frequency can be set using the TS Interface Configuration register (see the 88F6180,
88F6190, 88F6192, and 88F6281 Functional Specifications).
6. For the minimum value refer to the Baud Rate Register section of the 88F6180, 88F6190,
88F6192, and 88F6281 Functional Specifications.
7. The Ethernet Reference Clock parameters refer both to the reference clock for an Ethernet port
configured using the dedicated port pins and for an Ethernet port configured using the
multiplexed port pins.
T D M _ S P I O u t p u t C l o c k
TDM_SPI output clock F
TDM_SPI_SCK
8.192 MHz
S M I M a s t e r M o d e R e f e r e n c e C l o c k
SMI output MDC clock F
GE_MDC
TCLK/128 MHz
T W S I M a s t e r M o d e R e f e r e n c e C l o c k
SCK output clock F
TW_SCK
TCLK/
1600 kHz 6
P T P R e f e r e n c e C l o c k
Frequency F
PTP_CLK
125 -
100 ppm
125 +
100 ppm
MHz
Clock duty cycle DC
PTP_CLK
40 60 %
Slew rate SR
PTP_CLK
0.7 V/ns 1
Pk-Pk jitter JR
PTP_CLK
100 ps
Table 45: Reference Clock AC Timing Specifications (Continued)
D e s c r i p t i o n S y m b o l M i n M a x Units N o t e s