Marvel Group Integrated Controller 88F6281 - Manual (Page 48)

88F6281
Hardware Specifications
Doc. No. MV-S104859-U0 Rev. E Copyright © 2008 Marvell
Page 48 Document Classification: Proprietary Information December 2, 2008, Preliminary
1.3 Internal Pull-up and Pull-down Pins
Some pins of the device package are connected to internal pull-up and pull-down resistors. When
these pins are Not Connected (NC) on the system board, these resistors set the default value for
input and sample at reset configuration pins.
The internal pull-up and pull-down resistor value is 50 k
Ω. An external resistor with a lower value can
override this internal resistor.
Table 23: Internal Pull-up and Pull-down Pins
P i n N a m e P i n N u m b e r P u l l u p / P u l l d o w n
GE_TXD[0] H02 Pull down
GE_TXD[1] H01 Pull down
GE_TXD[2] H03 Pull up
GE_TXD[3] H04 Pull up
GE_TXCTL J04 Pull down
GE_MDC L03 Pull up
JT_TMS_CORE T14 Pull up
JT_RSTn T15 Pull down
JT_TDI R14 Pull up
JT_TMS_CPU V15 Pull up
NF_ALE R10 Pull up
NF_REn U11 Pull down
NF_CLE R11 Pull down
NF_CEn V11 Pull up
NF_WEn V12 Pull up
MRn F04 Pull up
MPP[1] V08 Pull down
MPP[2] V07 Pull down
MPP[3] V09 Pull down
MPP[4] T09 Pull up
MPP[5] T10 Pull up
MPP[7] R06 Pull up
MPP[10] R07 Pull down
MPP[11] T07 Pull up
MPP[12] U12 Pull down
MPP[14] V13 Pull up
MPP[18] V10 Pull up
MPP[19] U10 Pull up
MPP[33] N03 Pull down