Motorola DSP56301 - Manual (Page 298)

A -2 DSP56301 User’s Manual
; 7-0). The memory is selected by the Address Attribute AA1 and is
; accessed with 31 wait states.
;
; The EPROM bootstrap code expects first to read 3 bytes specifying the
; number of program words, then 3 bytes specifying the address to
; start loading the program words, and then 3 bytes for each program word
; to be loaded. The number of words, the starting address, and the program
; words are read least significant byte first followed by the mid and
; then by the most significant byte.
;
; The program words will be condensed into 24-bit words and stored in
; contiguous PRAM memory locations starting at the specified starting
; address. After the program words are read, program execution starts
; from the same address where loading started.
;
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; If MD:MC:MB:MA=x010, then it loads the program RAM from the SCI interface.
;
; The SCI bootstrap code expects first to receive 3 bytes specifying the
; number of program words, then 3 bytes specifying the address to
; start loading the program words, and then 3 bytes for each program word
; to be loaded. The number of words, the starting address, and the program
; words are received least significant byte first followed by the mid and
; then by the most significant byte.
;
; The program words will be condensed into 24-bit words and stored in
; contiguous PRAM memory locations starting at the specified starting
; address. After reading the program words, program execution starts
; from the same address where loading started.
;
; The SCI is programmed to work in asynchronous mode with 8 data bits, 1
; stop bit and no parity. The clock source is external and the clock
; frequency must be 16x the baud rate. After each byte is received, it
; is echoed back through the SCI transmitter.
;
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; If MD:MC:MB:MA=x011, then it loads the program RAM from the Host Interface
; programmed to operate in the Universal Bus mode supporting DSP-to-DSP
; glueless connection.
;
; The HI32 bootstrap code expects first to read a 24-bit word specifying
; the number of program words, then a 24-bit word specifying the
; address to start loading the program words, and then 24-bit word for
; each program word to be loaded.
;
; The program words will be stored in contiguous PRAM memory
; locations starting at the specified starting address. After
; the program words are read, program execution starts from the same
; address where loading started.
;
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0) in HCTR register. This will start execution of the
; loaded program from the specified starting address.
;
; During the access, the HAEN and HA[10 – 3] pins must be driven low; pins
; HA[2 – 0] select the HI32 registers.
; Before booting through the Host Interface it is recommended that the