Motorola DSP56301 - Manual (Page 71)

Memory Maps
Memory Configuration 3 -11
Figure 3-5. Instruction Cache Enabled (1, 0, 0)
Program
$FFFFFF
$000000
Internal
External
X Data
$FFFFFF
$000000
$000800
External
Internal X Data
RAM (2K)
Internal I/O
Y Data
$FF0000
$000C00
$FFFF80
Bootstrap ROM
1
Internal—
Reserved
$FF00C0
External
Internal—
Reserved
$FFF000
$FF0000
$FFFFFF
$000000
External
Internal Y Data
RAM (2K)
External I/O
$FFFF80
External
Internal—
Reserved
$FFF000
$FF0000
(128 words) (128 words)
Bit Settings Memory Configuration
CE MS SC Program RAM X Data RAM Y Data RAM Cache
Addressable
Memory Size
1 0 0 3K
$000–$BFF
2K
$000–$7FF
2K
$000–$7FF
1K
not addressable
16M
Note: 1. Address range is for 3 K bootstrap space.
Program RAM
(3K)
$000800
NOTE: External program memory begins immediately after the internal program memory. The
internal memory modules that are mapped to the addresses $00C00–$001000 are used as
I-Cache space when the I-Cache is enabled, and these addresses become part of the external
P memory space.