ST & T UPSD3212C - Manual (Page 119)

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uPSD3212A, uPSD3212C, uPSD3212CV
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure
62 ):
■ MCU I/O Mode
■ CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
■ CPLD Input – via the Input Macrocells (IMC)
■ In-System Programming (ISP) – JTAG pins
(TMS, TCK, TDI, TDO) are dedicated pins for
device programming. (See
PROGRAMMING
IN-CIRCUIT USING THE JTAG SERIAL
INTERFACE, page 127
, for more information
on JTAG programming.)
■ Open Drain – Port C pins can be configured in
Open Drain Mode
■ Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Standby (V
STBY
).
PC4 can be configured as a Battery-on
Indicator (V
BATON
), indicating when V
CC
is
less than V
BAT
.
Port C does not support Address Out Mode, and
therefore no Control Register is required.
Figure 62. Port C Structure
Note: 1. ISP or battery back-up
MCU DATA BUS
DATA OUT
REG.
D Q
D Q
WR
WR
MCELLBC[ 7:0]
ENABLE PRODUCT TERM (.OE)
READ MUX
P
D
B
CPLD - INPUT
DIR REG.
INPUT
MACROCELL
ENABLE OUT
SPECIAL FUNCTION
1
SPECIAL FUNCTION
1
CONFIGURATION
BIT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT C PIN
DATA OUT
AI06618