LSI 20160 - Manual (Page 14)

1-2 Describing the LSI20160
Copyright © 2001 by LSI Logic Corporation. All rights reserved.
The LSI53C1000 contains a SCSI SCRIPTS™ processor that permits
both DMA and SCSI commands to be fetched from host memory or
internal SCRIPTS RAM. Algorithms written in SCSI SCRIPTS control the
actions of the SCSI and DMA cores. The SCRIPTS processor executes
complex SCSI bus sequences independently of the host CPU.
In addition to this guide there is another reference that you will find
useful. The LSI Logic PCI Storage Device Management System
SDMS 4.0 User’s Guide contains product information and installation
instructions.
1.2 Features
This section provides an overview of the PCI interface, the SCSI
interface, and board characteristics for the LSI20160.
1.2.1 PCI Interface
The PCI interface operates as a 32-bit DMA bus master, where the
connection is made through the J1 edge connector.
The PCI interface includes these features:
•
Complies with PCI Local Bus Specification, Revision 2.2
•
Complies with PC99
•
Complies with PCI Bus Power Management Specification,
Revision 1.1
•
Supports 32-bit 33 MHz word data bursts with variable burst lengths
•
Bursts 4/8, 8/16, 16/32, or 32/64 Qword/Dword transfers across the
PCI bus
•
Bursts up to 264 Mbytes/s (@ 33 MHz) with zero wait-state bus
master data
•
Supports the PCI Cache Line Size (CLS) register
•
Prefetches up to 8 Dwords of SCRIPTS instructions
•
Supports PCI Write and Invalidate, Read Line, and Read Multiple
commands
•
Supports universal 3.3 V and 5 V PCI bus signaling environment