8 display of bus information on the 740 debugger – Renesas Emulator Debugger M16C PC4701 User Manual

Page 194

Advertising
background image


7.11.8 Display of bus information on the 740 Debugger

From left to right, the contents are as follows:

Address
The status of the address bus

Data
The status of the data bus

Sync
This signal is output when fetching an instruction op-code. When an op-code is being fetched, this
signal indicates a logic 1.This Sync value is sometimes displayed as '(1)'.In this case, it denotes a
dummy Sync meaning that the instruction on the line is not actually executed.

Read
This signal determines the direct ion of the data bus. When data is to be read, this signal
indicates a logic 0.

Write
This signal determines the direct ion of the data bus. When data is to be written, this signal
indicates a logic 0.

B-T
Shows the level of the external break trigger (the EXTIN7 pin of the external trace signal input
cable). High level = "1", Low level = "0".

Q-T
Shows the level of the external trace trigger (the EXTIN6 pin of the external trace signal input
cable). High level = "1", Low level = "0".

76543210
Shows the status of the 8-bit external signal (pins EXTIN0 to EXTIN7 of the external trace signal
input cable). High level = "1", Low level = "0".

h" m' s: ms.us
Show the elapsed time from the target program beginning.

180

Advertising