Oki ML520 User Manual
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Service Guide ML520/521
Chapter 2 Principles of Operation
2.1.03 Parallel Interface Control
The parallel data input from the host to the interface LSI is latched to the internal register at the falling
edge of the STROBE-N signal.
The LSI sets the BUSY-N signal to inform the host that the data is being processed. The LSI also outputs
the RXD-N signal to inform the MPU of data reception. The data is read upon receiving the RD-N signal
from the MPU.
When the data processing is complete, the BUSY-N signal is disabled and the ACK-N signal is sent to
request the next data. When the buffer is full and reception is not desired, the BUSY signal is sent to
request data transmission be stopped.
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