Texas Instruments MSP50C614 User Manual
Page 76
I/O
3-6
3.1.4
Branch on D Port
Instructions exist to branch conditionally depending upon the state of ports D
0
and D
1
. These conditionals are COND1 and COND2, respectively. The condi-
tionals are supported whether the D
0
and D
1
ports are configured as inputs or
as outputs. The following table lists the four possible logical states for D
0
and
D
1
, along with the software instructions affected by them.
D
0
= 1
COND1 = TRUE. . .
CIN1
CNIN1
JIN1
JNIN1
has its conditional call taken.
has its conditional call ignored.
has its conditional jump taken.
has its conditional jump ignored.
D
0
= 0
COND1 = FALSE. . .
CIN1
CNIN1
JIN1
JNIN1
has its conditional call ignored.
has its conditional call taken.
has its conditional jump ignored.
has its conditional jump taken.
† D
1
= 1
COND2 = TRUE. . .
CIN2
CNIN2
JIN2
JNIN2
has its conditional call taken.
has its conditional call ignored.
has its conditional jump taken.
has its conditional jump ignored.
† D
1
= 0
COND2 = FALSE. . .
CIN2
CNIN2
JIN2
JNIN2
has its conditional call ignored.
has its conditional call taken.
has its conditional jump ignored.
has its conditional jump taken.
† COND2 may be associated instead with the comparator function, if the comparator Enable bit
is set. Please refer to Section 3.3,
Comparator, for details.
3.1.5
Internal and External Interrupts
INT3, INT4, INT6, and INT7 are external interrupts which may be triggered by
events on the PD
2
, PD
3
, PD
4
, and PD
5
pins. These interrupts are supported
whether the D-port pins are programmed as inputs or outputs. (When
programmed as an output, the pin effectively triggers a software interrupt.)
INT5 is an external interrupt triggered by a falling-edge event on any of the
F-port inputs. It is triggered if all eight port-F pins are held high, and then one
or more of these pins is taken low.
Only the transition from 0xFFh (all high) to (one or more pins) low will trigger
the INT5 event. If any F-port pin is continuously held low and another is toggled
high-to-low, no interrupt is detected at the toggling pin. After all F-port pins
have been brought high again, then it is possible for a new INT5 trigger to
occur.
INT0 is an internal interrupt (highest priority) which is triggered by an underflow
condition on the DAC Timer (see Section 3.2.2,
DAC Control and Data