Xilinx SP601 Hardware UG518 - Manual (Page 34)

34 www.xilinx.com SP601 Hardware User Guide
UG518 (v1.1) August 19, 2009
Chapter 1: SP601 Evaluation Board
12. FPGA INIT and DONE LEDs
The typical Xilinx FPGA power up and configuration status LEDs are present on the
SP601. The INIT LED DS10 comes on after the FPGA powers up and completes its internal
power-on process. The DONE LED DS9 comes on after the FPGA programming bitstream
has been downloaded and the FPGA successfully configured.
X-Ref Target - Figure 1-21
Figure 1-21: FPGA INIT and DONE LEDs
INIT_B = 0, LED: ON
INIT_B = 1, LED: OFF
FPGA INIT B
FPGA DONE
VCC2V5
VCC2V5
VCC2V5
R23
4.7K
5%
1/16W
R90
27.4
1%
1/16W
R89
27.4
1%
1/16W
R113
332
1%
1/16W
1
2
1
2
1
2
1
2
LED-RED-
S
MT
LED-GRN-
S
MT
1
2
2
D
S
9
D
S
10
1
UG518_21_070809
Table 1-16: FPGA INIT and DONE LED Connections
FPGA U1 Pin Schematic Netname Controlled LED
U3 FPGA_INIT_B DS10 INIT
V17 FPGA_DONE DS9 DONE
X-Ref Target - Figure 1-22 NET "FPGA_INIT_B" LOC = "U3";
NET "FPGA_DONE" LOC = "V17";
Figure 1-22: UCF Location Constraints for FPGA INIT and DONE