Xilinx SP601 Hardware UG518 - Manual (Page 55)

SP601 Hardware User Guide www.xilinx.com 55
UG518 (v1.1) August 19, 2009
NET "PHY_TXCTL_TXEN" LOC = "B8";
NET "PHY_TXC_GTXCLK" LOC = "A9";
NET "PHY_TXD0" LOC = "F8";
NET "PHY_TXD1" LOC = "G8";
NET "PHY_TXD2" LOC = "A6";
NET "PHY_TXD3" LOC = "B6";
NET "PHY_TXD4" LOC = "E6";
NET "PHY_TXD5" LOC = "F7";
NET "PHY_TXD6" LOC = "A5";
NET "PHY_TXD7" LOC = "C5";
NET "PHY_TXER" LOC = "A8";
NET "SMACLK_N" LOC = "H18";
NET "SMACLK_P" LOC = "H17";
NET "SPI_CS_B" LOC = "V3";
NET "SYSCLK_N" LOC = "K16";
NET "SYSCLK_P" LOC = "K15";
NET "USB_1_CTS" LOC = "U10";
NET "USB_1_RTS" LOC = "T5";
NET "USB_1_RX" LOC = "L12";
NET "USB_1_TX" LOC = "K14";
NET "USER_CLOCK" LOC = "V10";