Rainbow Electronics AT77C105A - Manual (Page 3)

3
AT77C105A [Preliminary]
5419A–BIOM–01/05
Figure 1. Typical Application
The pull-up must be implemented for the master controller. The noise should be lower
than 30 mV peak to peak on VDDA.
Figure 2. Pin Description
The TESTA pin is only used for testing and debugging. The SCANEN pin is not used in
the final application and must be connected to ground.
Warning: SSS and FSS must never be low at the same time. When both SSS and FSS
equal 0, the chip switches to scan test mode. With the SPI protocol, this
configuration is not possible as only one slave at a time can be selected.
However, this configuration works when debugging the system.
TESTA
IRQ VDD_IO
MISO VDDD
MOSI
SCK GNDD
SSS VDDA
FSS
SCANEN GNDA
FPL
RST
VDDA
10 k
Ω
10 k
Ω
VDDD VDDD
10µF
GND
NC
10µ
GND
VDDD
F
VDD_IO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
NC
NC
NC
NC
GNDD
GNDA
VDDD
VDDA
SCK
TESTA
MOSI
VDD_IO
MISO
SCANEN
SSS
IRQ
FSS
RST
FPL