Rainbow Electronics MAX3107 - Manual (Page 14)

14 _____________________________________________________________________________________
MAX3107
SPI/I
2
C UART with 128-Word FIFOs
and Internal Oscillator
Register Map
(All default reset values are 0x00, unless otherwise noted. All registers are R/W, unless otherwise noted.)
*Denotes nonzero default reset value: ISR = 0x60, LCR = 0x05, FIFOTrgLvl = 0xFF, PLLConfig = 0x01, DIVLSB = 0x01,
CLKSource = 0x08, RevID = 0xA1.
†Denotes nonread/write value: RHR = R, THR = W, ISR = COR, SpclCharInt = COR, STSInt = R/COR, LSR = R, TxFIFOLvl = R,
RxFIFOLvl = R, RevID = R.
REGISTER ADDR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
FIFO DATA
RHR†
0x00 RData7 RData6 RData5 RData4 RData3 RData2 RData1 RData0
THR† 0x00 TData7 TData6 TData5 TData4 TData3 TData2 TData1 TData0
INTERRUPTS
IRQEn
0x01 CTSIEn RxEmtyIEn TxEmtyIEn TxTrgIEn RxTrgIEn STSIEn SpclChrIEn LSRErrIEn
ISR*† 0x02 CTSInt RxEmptyInt TxEmptyInt TFifoTriglnt RFifoTrigInt STSInt SpCharInt LSRErrInt
LSRIntEn 0x03 — — NoiseIntEn RBreakIEn FrameErrIEn ParityIEn ROverrIEn RTimoutIEn
LSR*† 0x04 CTSbit — RxNoise RxBreak FrameErr RxParityErr RxOverrun RTimeout
SpclChrIntEn 0x05 — — MltDrpIntEn BREAKIntEn XOFF2IntEn XOFF1IntEn XON2IntEn XON1IntEn
SpclCharInt † 0x06 — — MultiDropInt BREAKInt XOFF2Int XOFF1Int XON2Int XON1Int
STSIntEn 0x07 — SleepIntEn ClkRdyIntEn — GPI3IntEn GPI2IntEn GPI1IntEn GPI0IntEn
STSInt*† 0x08 — SleepInt ClockReady — GPI3Int GPI2Int GPI1Int GPI0Int
UART MODES
MODE1
0x09 IRQSel AutoSleep ForcedSleep TrnscvCtrl RTSHiZ TXHiZ TxDisabl RxDisabl
MODE2 0x0A EchoSuprs MultiDrop Loopback SpecialChr RxEmtyInv RxTrigInv FIFORst RST
LCR* 0x0B RTS TxBreak ForceParity EvenParity ParityEn StopBits Length1 Length0
RxTimeOut 0x0C TimOut7 TimOut6 TimOut5 TimOut4 TimOut3 TimOut2 TimOut1 TimOut0
HDplxDelay 0x0D Setup3 Setup2 Setup1 Setup0 Hold3 Hold2 Hold1 Hold0
IrDA 0x0E — — TxInv RxInv MIR ShortIR SIR IrDAEn
FIFO CONTROL
FlowLvl
0x0F Resume3 Resume2 Resume1 Resume0 Halt3 Halt2 Halt1 Halt0
FIFOTrgLvl* 0x10 RxTrig3 RxTrig2 RxTrig1 RxTrig0 TxTrig3 TxTrig2 TxTrig1 TxTrig0
TxFIFOLvl† 0x11 TxFL7 TxFL6 TxFL5 TxFL4 TxFL3 TxFL2 TxFL1 TxFL0
RxFIFOLvl† 0x12 RxFL7 RxFL6 RxFL5 RxFL4 RxFL3 RxFL2 RxFL1 RxFL0
FLOW CONTROL
FlowCtrl
0x13 SwFlow3 SwFlow2 SwFlow1 SwFlow0 SwFlowEn GPIAddr AutoCTS AutoRTS
XON1 0x14 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
XON2 0x15 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
XOFF1 0x16 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
XOFF2 0x17 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
GPIOs
GPIOConfg
0x18 GP3OD GP2OD GP1OD GP0OD GP3Out GP2Out GP1Out GP0Out
GPIOData 0x19 GPI3Dat GPI2Dat GPI1Dat GPI0Dat GPO3Dat GPO2Dat GPO1Dat GPO0Dat
CLOCK CONFIGURATION
PLLConfig*
0x1A PLLFactor1 PLLFactor0 PreDiv5 PreDiv4 PreDiv3 PreDiv2 PreDiv1 PreDiv0
BRGConfig 0x1B — — 4xMode 2xMode FRACT3 FRACT2 FRACT1 FRACT0
DIVLSB 0x1C Div7 Div6 Div5 Div4 Div3 Div2 Div1 Div0
DIVMSB 0x1D Div15 Div14 Div13 Div12 Div11 Div10 Div9 Div8
CLKSource* 0x1E CLKtoRTS — —- ExtClock PLLBypass PLLEn CrystalEn IntOscEn
REVISION
RevID*†
0x1F 1 0 1 0 0 0 0 1