Rainbow Electronics MAX3107 - Manual (Page 48)

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MAX3107
SPI/I
2
C UART with 128-Word FIFOs
and Internal Oscillator
To reduce the power consumption during normal opera-
tion, the following techniques can be adopted:
• Do not use the internal PLL. This saves the most power
of the options listed here. Disable and bypass the PLL.
With the PLL enabled, the current to the V
A supply is
in the range of a few mA (depending on clock and
multiplication factor), while it drops to below 1mA if
disabled.
• Use an external clock source. Of the three clocking
sources, the internal oscillator consumes the most
power (about double that when using an external
crystal).
• Keep the internal clock rates as low as possible.
• Use low voltage on the V
A supply.
• Use an external 1.8V supply. This saves the power
dissipated in the internal 1.8V linear regulator for the
1.8V logic supply. Connect the external 1.8V supply to
V
18 and disable the internal regulator by connecting
LDOEN to DGND.
Interrupts and Polling
The host controller can manage and control the MAX3107
through polling and/or through interrupts. In polled
mode, the IRQ physical interrupt output is not used and
the host controller polls the ISR register at frequent inter-
vals to establish the state of the MAX3107.
Alternatively, the MAX3107’s physical IRQ interrupt
can be used to interrupt the host controller at specified
events, making polling unnecessary. The IRQ output is
an open-drain output that requires a pullup resistor to V
L .
Logic-Level Translation
The MAX3107 can be directly connected to transceivers
and controllers that have different supply voltages. The
V
L input defines the logic voltage levels of the control-
ler interface while the V EXT voltage defines the logic of
the transceiver interface. This ensures flexibility when
selecting a controller and transceiver. Figure 24 is an
example of a setup when the controller, transceiver, and
the MAX3107 are powered by three different supplies.
Figure 23. Startup and Initialization Flowchart
POWER-UP/
RST INPUT PULLED HIGH/
RST BIT SET LOW
IS IRQ HIGH?
OR
RevID READ
SUCCESSFULLY
Y
N
CONFIGURE
CLOCKING
CONFIGURE
MODES
CONFIGURE
FIFO CONTROL
CONFIGURE
FLOW CONTROL
CONFIGURE
GPIOs
START
COMMUNICATION
ENABLE
INTERRUPTS