Flowctrl—flow control register, Max3107 spi/i, C uart with 128-word fifos and internal oscillator – Rainbow Electronics MAX3107 User Manual

Page 37

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______________________________________________________________________________________ 37

MAX3107

SPI/I

2

C UART with 128-Word FIFOs

and Internal Oscillator

Bits 7–4: SwFlow[3:0]
The SwFlow[3:0] bits configure auto software flow control and/or special character detection in combination with the
characters defined in the XON1, XON2, XOFF1 and/or XOFF2 registers. See Table 3.
FlowCtrl[5:4] select which of the XON1, XON2, XOFF1 or/and XOFF2 characters are used for special character detec-
tion and/or auto flow control. If auto receiver flow control is enabled through SwFlowEn and FlowCtrl[7:6], the XON and
XOFF characters that the MAX3107 receives are filtered out and are not put into the RxFIFO. Set the SwFlowEn bit to
0 and set MODE2[4] to 1 to only enable special character detection. Under these conditions, autoflow transmit flow
control is not active.
If both special character detection (MODE2[4]) and automatic software flow control (FlowCtrl[3]) are to be enabled,
XON1 and XOFF1 define the autoflow control characters, while XON2 and XOFF2 define the special character detec-
tion characters.
Bit 3: SwFlowEn
The SwFlowEn bit enables automatic software flow control. The characters used for automatic software flow control are
selected in SwFlow[7:4]. If special character detection (MODE2[4] set to 1) is used in addition to automatic software
flow control, XON1 and XOFF1 are used for flow control, while XON2 and XOFF2 define the special characters.
Bit 2: GPIAddr
The GPIAddr bit, when set, enables that the four GPIO_ inputs are used in conjunction with XOFF2 for the definition of a
special character. This can be used, for example, for defining the address of a RS-485 slave device through hardware.
The GPIO_ inputs logic levels, which define the 4 LSBs of the special character, while the 4 MSBs are defined by the
XOFF2[7:4] bits. If GPIAddr is set, the contents of the XOFF2[3:0] bits are neglected. In this case, the XOFF2[3:0] bits,
when read, also do not reflect the logic on GPIO_.
Bit 1: AutoCTS
The AutoCTS bit enables automatic CTS flow control by which the transmitter stops and starts sending data depend-
ing on the logic state at the CTS input. See the Automatic Hardware Flow Control section for a description of AutoCTS
flow control. Logic changes at the CTS input result in an ISR[7]: CTSInt interrupt. The transmitter must be turned off by
setting MODE1[1] to 1 before AutoCTS is enabled.
Bit 0: AutoRTS
The AutoRTS bit enables automatic RTS flow control by which the MAX3107 sets its RTS/CLKOUT output dependent
on the receive FIFO fill level. The FIFO thresholds at which RTS/CLKOUT changes state are set in FlowLvl. See the
Automatic Hardware Flow Control section for more information.

FlowCtrl—Flow Control Register

ADDRESS:

0x13

MODE:

R/W

BIT

7

6

5

4

3

2

1

0

NAME

SwFlow3

SwFlow2

SwFlow1

SwFlow0

SwFlowEn

GPIAddr

AutoCTS

AutoRTS

RESET

0

0

0

0

0

0

0

0

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