Rainbow Electronics MAX1386 - Manual (Page 38)

MAX1385/MAX1386
Dual RF LDMOS Bias Controllers
with I
2 C/SPI Interface
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FIFOOVER is set to 1 when the FIFO overflows.
FIFOOVER is set to 0 after reading the Flag register.
All threshold-related bits in the Flag register can be
cleared at once by writing to the ALMSCLR bit in the
Software Alarm Configuration register (see the
ALMSCFG
(Read/Write) section). HIGHI2 is set to 1 when the chan-
nel 2 current exceeds its high threshold. HIGHI2 resets to
0 after reading the Flag register. LOWI2 is set to 1 when
the channel 2 current drops below its low threshold.
LOWI2 resets to 0 after reading the Flag register.
HIGHT2 is set to 1 when the channel 2 temperature
measurement exceeds its high threshold. HIGHT2
resets to 0 after reading the Flag register. The LOWT2
is set to 1 when the channel 2 temperature measure-
ment drops below its low threshold. LOWT2 resets to 0
after reading the Flag register.
HIGHI1 is set to 1 when the channel 1 current exceeds
its high threshold. HIGHI1 resets to 0 after reading the
Flag register. LOWI1 is set to 1 when the channel 1 cur-
rent drops below its low threshold. LOWI1 resets to 0
after reading the Flag register. HIGHT1 is set to 1 when
the channel 1 temperature measurement exceeds its
high threshold. HIGHT1 resets to 0 after reading the
Flag register. LOWT1 is set to 1 when the channel 1
temperature measurement drops below its low thresh-
old. LOWT1 resets to 0 after reading the Flag register.
Digital Serial Interface
The MAX1385/MAX1386 contain an I 2 C-/SPI-compati-
ble serial interface for configuration. Connect the mode-
select input, SEL, to DGND to select I
2 C mode. In I 2 C
mode, the MAX1385/MAX1386 provide address inputs
A0 to A2 to allow eight devices to be connected on the
same bus (see the
Slave Address Byte section).
Connect SEL to DV DD to select SPI mode. In SPI mode,
drive A0/ CSB low to select the device. The MAX1385/
MAX1386 support fast (400kHz) and high-speed
(1.7MHz or 3.4MHz) data-transfer modes. Data trans-
fers occur in 8-bit bytes with acknowledge (ACK) or
not-acknowledge (NACK) bits following each byte. The
MAX1385/ MAX1386 are permanent slaves and do not
generate their own clock signals. Figure 11 shows the
various read/write formats.
Write Format
Use the following sequence to write a single word (see
Figure 11):
1) After generating a START condition (S or Sr),
address the MAX1385/MAX1386 by sending the
appropriate slave address byte with its correspond-
ing R/
W bit set to zero (see the Slave Address Byte
section). The MAX1385/MAX1386 answer with an
ACK bit (see the
Acknowledge Bits section).
2) Send the appropriate write command byte (see the
Command Byte section). The MAX1385/MAX1386
answer with an ACK bit.
3) Send the most significant 8-bit section of the 16-bit
data word, sending the MSBs first (see the Data
Bytes section). The MAX1385/MAX1386 answer with
an ACK bit.
4) Send the least significant 8-bit section of the 16-bit
data word, sending the MSBs first. The MAX1385/
MAX1386 answer with an ACK bit.
5) Generate a (repeated) START or STOP condition (Sr
or P).
To write to a block of registers, use the same steps as
above but repeat steps 2, 3, and 4 without any START,
STOP, or repeated START conditions (Sr). Finish the
block write by generating a STOP condition.
Read Format
All read operations can begin with a Sr as well as an S
condition. One type of read is a 5-byte operation, one is
a 3-byte operation, and the other is a continuous read
operation. The 5-byte operation reads from the register
address contained in one of the 5 bytes sent. The 3-
byte operation reads from the last register address
accessed. Use the following 5-byte sequence to read
DATA BIT POR FUNCTION
D15–D10 X Don’t care.
D9–D0 00 0000 0000
10-bit fine DAC input code. D9
is the MSB.
Table 22. FINETHRUCAL1 and
FINETHRUCAL2 (Write)
DATA BIT POR FUNCTION
D15–D8 X Don’t care.
D7–D0 0000 0000
8-bit coarse high wiper DAC
input code. D7 is the MSB.
Table 20. THRUHI1 and THRUHI2
(Read/Write)
DATA BIT POR FUNCTION
D15–D8 X Don’t care.
D7–D0 0000 0000
8-bit coarse high wiper DAC input
code. D7 is the MSB.
Table 21. THRULO1 and THRULO2
(Read/Write)