2 × 12a digital dual microdlynx, Non-isolated dc-dc power modules, Datasheet – GE Industrial Solutions 2 × 12A Digital Dual Output MicroDLynx User Manual

Page 28

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GE

Datasheet

2 × 12A Digital Dual MicroDlynx

TM

: Non-Isolated DC-DC Power Modules

4.5Vdc –14.4Vdc input; 0.51Vdc to 5.5Vdc output; 2 × 12AOutput Current

February 14, 2014

©2014 General Electric Corporation. All rights reserved.

Page 28


Table 6 (Continued)








Hex

Code

Command

Brief Description

Non-Volatile

Memory Storage

8E READ_TEMPERATURE_2

Returns the value of the external temperature in degree Celsius

Format

Linear, two’s complement binary

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

R

r

r r

Function

Exponent Mantissa

Default Value

0 0 0 0 0 V V V

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

r

r

r r

Function

Mantissa

Default Value

V V V V V V V 0

V - Variable

98 PMBUS_REVISION

Returns one byte indicating the module is compliant to PMBus Spec. 1.1 (read only)

Format

Unsigned Binary

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

r

r

r r

Default Value

0 0 0 1 0 0 0 1

D0 MFR_SPECIFIC_00

Returns module name information

Format

Unsigned Binary

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

r

r

r r

Function

Reserved

Default Value

1 1 1 0 1 0 0 0

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

r

r

r r

Function

Module Name

Reserved

Default Value

0 0 0 0 1 1 1 0

YES

D4 VREF_TRIM

Applies a fixed offset to the reference voltage. Max trim range is -20% to +10% in 2mV
steps. Permissible values range between -120mV and +60mV. The offset is calculated
as VREF_TRIMx2

-9

. Exponent fixed at -9(dec)

Format

Linear, two’s complement binary

Bit Position

7 6 5 4 3 2 1 0

Access

r/w r r

r

r

r

r r

Function

Mantissa

Default Value

V V V V V V V V

Bit Position

7 6 5 4 3 2 1 0

Access

r r r/w

r/w

r/w

r/w

r/w r/w

Function

Mantissa

Default Value

V V V V V V V V

YES

D5 STEP_VREF_MARGIN_HIGH

Applies a fixed offset to the reference voltage. Adjustment is 0% to +10% in 2mV steps.
Permissible values range between 0mV and +60mV. The offset is calculated as
(STEP_VREF_MARGIN_HIGH + VREF_TRIM)x2

-9

. Exponent fixed at -9(dec). Net output

voltage includes VREF_TRIM adjustment and ranges from -30% to 10%

Format

Linear, two’s complement binary

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r

r

r

r r

Function

Mantissa

Default Value

V V V V V V V V

Bit Position

7 6 5 4 3 2 1 0

Access

r r r

r/w

r/w

r/w

r/w r/w

Function

Mantissa

Default Value

V V V V V V V V

YES

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