Memory bus write access – AMD Am79C930 User Manual

Page 140

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AMD

P R E L I M I N A R Y

140

Am79C930

MEMORY BUS WRITE ACCESS

Parameter

Symbol

Parameter Description

Test Conditions

Min

Max

Unit

t

m

AD

MA[16:0] valid from CLKIN

2

100

ns

t

m

CD

CE

active delay from CLKIN

Note 1

2

100

ns

t

m

WD

MWE

active delay from CLKIN

2

100

ns

t

m

CQ

MD[7:0] driven from CLKIN

2

ns

t

m

CV

MD[7:0] valid from CLKIN

100

ns

t

m

AS

Address Setup Time to

MWE

T

CLKIN

-20

ns

t

m

AW

Address Write Access Time

0 wait states

160

ns

(Note 3)

1 wait state

260

ns

2 wait states

360

ns

t

m

CW

CE

Write Access Time

0 wait states

160

ns

(Notes 1, 3)

1 wait state

260

ns

2 wait states

360

ns

t

m

WP

MWE

Write Access Time

0 wait states

150

ns

(Note 3)

1 wait state

250

ns

2 wait states

350

ns

t

m

WQ

MWE

to MD[7:0] driven

–10

ns

t

m

AH

MA[16:0] valid hold from

MWE

T

CLKIN

-10

ns

t

m

CH

CE

valid hold from

MWE

Note 1

T

CLKIN

-10

ns

t

m

WI

CE

Inactive Time

Note 1, 2

0

ns

t

m

SW

MD[7:0] valid setup to

MWE

0 wait states

130

ns

1 wait state

230

ns

2 wait states

330

ns

t

m

HW

MD[7:0] valid hold from

MWE

Note 2

T

CLKIN

-15

ns

t

m

HWZ

MD[7:0] inactive from

MWE

Note 2

2 X T

CLKIN

-10

2 X T

CLKIN

+10

ns

Notes:

1.

CE

= one of:

FCE

,

SCE

,

XCE

2. Parameter not included in the production test.

3. Value is dependent upon TCLKIN value. Value given is for CLKIN = 20 MHz.

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