AMD Am79C930 - Manual (Page 5)

Am79C930 5
P R E L I M I N A R Y
BLOCK DIAGRAM
Transceiver Attachment Interface Unit
C
R
C
MA[4:0]
MD[7:0]
CLKIN
Slave
Control
Memory
Interface
Bus I/O
and DMA
TIR0
Interrupt
Generator
TCR31
TX
FIFO
8
Bytes
TXD
RESET
TCR... TIR...
TIR31
TCR0
IRQ
DRQ[1:0]
RX
FIFO
15
Bytes
P->S S->P
C
R
C
RXD
SFD
Detect
FDET
ч40
ч5
ч10
ч20
M
U
X
TXC
DPLL
M
U
X
RXCIN
RXCSEL
RXC
C
Transceiver
Control
Signals
Transceiver Interface
Unit Control
Count
Empty
BIAS
Suppress
MUX
Phylen
MUX
÷80
TAICE
Slave
Control
Sleep
20183B-3