ARM AMBA NIC-301 - Manual (Page 36)

Functional Description
ARM DDI 0397G Copyright © 2006-2010 ARM. All rights reserved. 2-21
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All accesses must be secure to gain access to any programmers model register. Any non-secure
accesses to the programmers model receive a DECERR response. See Chapter 3 Programmers
Model.
Security registers are not updated if a pending transaction exists, or if a current ongoing lock
sequence exists.
2.3.8 Remap
Registers in the programmers model control the remap functionality. See Table 3-4 on page 3-7
in Chapter 3 Programmers Model for more information.
You can define a number of remap states using eight bits of the remap register, and a bit in the
remap register controls each remap state.
Note
You can use each remap state to control the address decoding for one or more slave interfaces.
If a slave interface is affected by two remap states that are both asserted, the remap state with
the lowest remap bit number takes precedence.
You can configure each slave interface independently so that a remap state can perform different
functions for different masters.
A remap state can:
•
alias a memory region into two different address ranges
• move an address region
• remove an address region.
Because of the nature of the distributed register sub-system, the masters receive the updated
remap bit states in sequence, and not simultaneously.
A slave interface does not update to the latest remap bit setting until:
•
the address completion handshake accepts any transaction that is pending
• any current lock sequence completes.
Note
The BRESP from a GPV after a remap update guarantees that the next transaction issued to each
slave interface, or the first one after the completion of a locked sequence, uses the updated value.
Figure 2-1 on page 2-22 to Figure 2-5 on page 2-23 show examples of how different remap
states interact with each other. Consider a configuration that uses three remap bits. Figure 2-1
on page 2-22 shows the memory map when remap is set to 000, representing no remap.