2 configuration programmers model, 1 register block types, Configuration programmers model -3 – ARM AMBA NIC-301 User Manual

Page 41: Figure 3-1, Address map of the programmers model -3

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Programmers Model

ARM DDI 0397G

Copyright © 2006-2010 ARM. All rights reserved.

3-3

ID031010

Non-Confidential

3.2

Configuration programmers model

The AMBA Network Interconnect can contain configuration registers, partitioned into a number
of individual 4KB blocks that you can program using the GPV. The base address of each GPV
region is set at configuration time in AMBA Designer (ADR-301).

You can configure any slave interface to have access to all of the registers in the programmers
view.

Note

Any registers that a switch requires are implemented within the register block of the associated
Interface Block (IB) register block. If no IB is attached, then you can configure an IB to
specifically provide programmable registers.

Ensure that you access the Global Programmers View (GPV) using non-cacheable transactions.

3.2.1

Register block types

The following types of register block exist:

one register block for each AMBA Network Interconnect configuration

one register block for each IB, where the IB can be:

AXI Slave Interface Block (ASIB), see Table 3-1 on page 3-4

AXI Master Interface Block (AMIB), see Table 3-2 on page 3-5

AXI internal network Interface Block (IB), see Table 3-3 on page 3-6.

Figure 3-1 shows the address map of the programmers model. It contains one fixed base
address, and all the other programmers model 4KB blocks are stacked.

Figure 3-1 Address map of the programmers model

Slave interface m registers

Slave interface 2 registers

Slave interface 1 registers

Slave interface 0 registers

Master interface n registers

Master interface 2 registers

Master interface 1 registers

Master interface 0 registers

ID registers

Address control registers

Maximum m = 127

Maximum n = 63

0x000C2000

0x000C1000

0x00042000

0x00044000

0x00043000

0x00041000

0x00003000

0x00002000

0x00001000

0x00000000

Configurable base address

0x00004000

Internal interface 0 registers

Internal interface 1 registers

Internal interface 2 registers

Internal interface p registers

0x000C3000

0x000C4000

0x000FF000

Maximum p = 61

Address offset

from base

0x00100000

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