Achronix Speedster22i Snapshot - Manual (Page 9)

.Monitor_ch(monitor_ch),
.trigger_ch(trigger_ch),
.rstn_out (rstn_out),
.Arm (Arm),
.Stimuli (Stimuli)
);
/////// NOTE: Parameter value sections for Snapshot macro //////
/////// Depend on Monitor Channel width //////
/////// Below is the Table showing how the RAM size parameter ////
/////// is impacted by the Monitor Channel width ///////////////////////
/***************************
RAM_SIZE Monitor-Channel-Width
36
72
108
144
***************************/
users_logic users_logic_block_instance ( .clk(usr_clk),
.rstn(rstn_out),
.data_out_from_block(monitor_ch),
.data_for_trigger(trigger_ch),
.snapshot_arm(Arm),
.stimuli(Stimuli)
);
endmodule
///////////// End of Sample Example ////////////////////////
Example of VHDL Instantiation:
--- VHDL entity for Top-Level Design Example with Snapshot Macro ---
--- as well as User’s Design block. This example will guide the user how ---
--- to implement Snapshot macro with User’s Logic block. ---
Library IEEE;
Use IEEE.std_logic_1164.all;
Use IEEE.std_logic_unsigned.all;
Use IEEE.numeric_bit.all;
entity user_design_with_snap_shot is
port ( tck : in std_logic;
trstn : in std_logic;
tms : in std_logic ;
tdi : in std_logic ;
tdo : out std_logic;
usr_clk : in std_logic );
end user_design_with_snap_shot;
architecture arch of user_design_with_snap_shot is
component ACX_SNAPSHOT is generic
( MNTR_WIDTH: natural := 144) ;
--- This above parameter should be varied (36, 72,108, 144) depending on user signal
--- to be monitored
port ( tck : in std_logic ;
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