Row c, Signal descriptions (cont’d), Express-lpc user’s manual page 20 – ADLINK Express-LPC User Manual
Page 20
Express-LPC User’s Manual
Page 20
Signal Descriptions (cont’d)
Row C
Pin
Signal
Description
Type
PU/PD
Comment
C1
GND
Ground
PWR
-
-
C2
IDE_D7
IDE Data Bus
IO
-
C3
IDE_D6
IDE Data Bus
IO
-
C4
IDE_D3
IDE Data Bus
IO
-
C5
IDE_D15
IDE Data Bus
IO
-
C6
IDE_D8
IDE Data Bus
IO
-
C7
IDE_D9
IDE Data Bus
IO
-
C8
IDE_D2
IDE Data Bus
IO
-
C9
IDE_D13
IDE Data Bus
IO
-
C10
IDE_D1
IDE Data Bus
IO
-
C11
GND
Ground
PWR
-
-
C12
IDE_D14
IDE Data Bus
IO
-
C13
IDE_IORDY
IDE I/O Ready
I-3.3
PU 4K7 3.3V
-
C14
IDE_IOR#
I/O read line to IDE device
O-3.3
-
C15
PCI_PME#
PCI Power Management Event
IO-3.3
int. PU 20k in ICH8
C16
PCI_GNT2#
PCI Bus Grant 2
O-3.3
int. PU 20k in ICH8
C17
PCI_REQ2#
PCI Bus Request 2
I-3.3
PU 8K2 3.3V
-
C18
PCI_GNT1#
PCI Bus Grant 1
O-3.3
int. PU 20k in ICH8
C19
PCI_REQ1#
PCI Bus Request 1
I-3.3
PU 8K2 3.3V
-
C20
PCI_GNT0#
PCI Bus Grant 0
O-3.3
int. PU 20k in ICH8
C21
GND
Ground
PWR
-
C22
PCI_REQ0#
PCI Bus Reqest 0
I-3.3
PU 8K2 3.3V
-
C23
PCI_RESET#
PCI Bus Reset
O-3.3
-
-
C24
PCI_AD0
PCI Adress & Data Bus line
IO-3.3
-
C25
PCI_AD2
PCI Adress & Data Bus line
IO-3.3
-
C26
PCI_AD4
PCI Adress & Data Bus line
IO-3.3
-
C27
PCI_AD6
PCI Adress & Data Bus line
IO-3.3
-
C28
PCI_AD8
PCI Adress & Data Bus line
IO-3.3
-
C29
PCI_AD10
PCI Adress & Data Bus line
IO-3.3
-
C30
PCI_AD12
PCI Adress & Data Bus line
IO-3.3
-
C31
GND
Ground
PWR
-
-
C32
PCI_AD14
PCI Adress & Data Bus line
IO-3.3
-
C33
PCI_C/BE1#
PCI Bus Command and Byte enables
IO-3.3
-
-
C34
PCI_PERR#
PCI Bus Grant Error
IO-3.3
PU 8K2 3.3V
-
C35
PCI_LOCK#
PCI Bus Lock
IO-3.3
PU 8K2 3.3V
-
C36
PCI_DEVSEL#
PCI Bus Device Select
IO-3.3
PU 8K2 3.3V
-
C37
PCI_IRDY#
PCI Bus Bus Initiator Ready
IO-3.3
PU 8K2 3.3V
-
C38
PCI_C/BE2#
PCI Bus Command and Byte enables
IO-3.3
-
C39
PCI_AD17
PCI Adress & Data Bus line
IO-3.3
-
C40
PCI_AD19
PCI Adress & Data Bus line
IO-3.3
-
C41
GND
Ground
PWR
-
-
C42
PCI_AD21
PCI Adress & Data Bus line
IO-3.3
-
C43
PCI_AD23
PCI Adress & Data Bus line
IO-3.3
-
C44
PCI_C/BE3#
PCI Bus Command and Byte enables
IO-3.3
-
-
C45
PCI_AD25
PCI Adress & Data Bus line
IO-3.3
-
C46
PCI_AD27
PCI Adress & Data Bus line
IO-3.3
-
C47
PCI_AD29
PCI Adress & Data Bus line
IO-3.3
-
C48
PCI_AD31
PCI Adress & Data Bus line
IO-3.3
C49
PCI_IRQA#
PCI Bus Interrupt Request A
I-3.3
PU 8K2 3.3V
-
C50
PCI_IRQB#
PCI Bus Interrupt Request B
I-3.3
PU 8K2 3.3V
-
C51
GND
Ground
PWR
-
C52
PEG_RX0+
PCIe 0 Recieve + / SDVO TV clock +
I - DP
not supported
C53
PEG_RX0-
PCIe 0 Recieve - / SDVO TV clock -
I - DP
-
not supported
C54
TYPE0#
Module type ID pin 0
NC
-
-
C55
PEG_RX1+
PCIe 1 Recieve + / SDVO B Interrupt +
I - DP
-
not supported