Echelon FTXL Hardware - Manual (Page 10)

2 FTXL Hardware Overview
Overview
Echelon’s Free Topology Smart Transceivers provide a well-tested and cost-
effective platform for many distributed control applications that are built on
L ON W ORKS technology. For high value sensors, smart actuators, or terminal
equipment controllers, an FT Smart Transceiver provides a well matched cost-to-
capability ratio. For more complex applications, the Echelon FTXL Transceiver
Chip provides an alternate processing platform for high-performance L ON W ORKS
applications.
The FTXL solution includes the following elements:
• The FTXL LonTalk protocol stack
The FTXL stack is a C++ implementation of the ANSI/CEA 709.1-B
protocol stack that has been ported to run on the Altera Nios II processor,
implemented on an Altera Cyclone II FPGA.
• FTXL Transceiver Chip
The FTXL 3190 Smart Transceiver Chip is an FT 3120 Smart
Transceiver that includes a firmware image that allows it to run as a
layer 2 parallel interface network transceiver.
• FTXL Design Components
The FTXL Developer’s Kit includes the FTXL design components for the
Altera SOPC Builder tool and Quartus II software.
• FTXL Reference Design
The reference design includes an Altera Quartus II project that targets a
specific Cyclone II development board, and provides the necessary VHDL
modules and configuration files to build an example Nios II target for the
FTXL LonTalk stack and FTXL Transceiver.
The FTXL Transceiver Chip can be configured to run at any of the following clock
frequencies, depending on the requirements of the FTXL device:
• 5 MHz
• 10 MHz
• 20 MHz
• 40 MHz
The FTXL LonTalk protocol stack provides support for the following
configurations:
• Up to 4096 addresses
• Up to 200 receive transactions
• Up to 2500 transmit transactions
• Up to 4096 network variables
• Up to 8192 alias table entries