Altera Avalon Tri-State Conduit Components - Manual (Page 13)

May 2011 Altera Corporation Avalon Tri-State Conduit Components User Guide
Preliminary
3. Tri-State Conduit Pin Sharer
The Tri-State Conduit Pin Sharer multiplexes between the signals of the connected
tri-state controllers. You can connect controllers created by customizing the Generic
Tri-State Controller or your own custom controllers. When you instantiate the
Tri-State Conduit Pin Sharer, you specify the number of connected interfaces and
identify the signals that share pins. The pin sharer arbitrates between connected
masters using a round-robin algorithm. It drives the signals of the granted Avalon-TC
master to the Tri-State Conduit Bridge.
The following sections explain how to use the Tri-State Conduit Pin Sharer in more
detail.
Signal Naming
The Avalon Interface Specifications for Avalon-TC interfaces requires that signal names
have the following two parts:
■ A role—The role defines the signal to Qsys and typically represents the function of
the signal. Signals with identical roles can be shared. Typical roles include:
address, data, read, and write.
■ A pin type—The pin type must be specified using a suffix appended to a signal’s
role. The Tri-State Conduit Pin Sharer recognizes three pin type suffixes:
_out ,
_outen , and _in . Theses three suffixes define the following four pin types:
■ Bidirectional—Bidirectional pins define three signals: <role>_outen ,
< role>_out , and <role>_in .
■ Tri-State output—Tri-State output pins define two signals: <role>_outen and
< role>_out . Use this pin type for outputs that should be driven to a high
impedance state during system reset.
■ Output—Output pins define a single signal: < role>_out .
■ Input—Input pins define a single signal: < role>_in .
Figure 3–1 illustrates the naming conventions for Avalon-TC shared pins.
If the widths of shared signals differ, the Tri-State Conduit Pin Sharer aligns them on
their 0
th bit and drives the higher-order pins to 0 whenever the narrower signal has
control of the bus. Signals that are not shared propagate directly through the Tri-State
Conduit Pin Sharer. In
Figure 3–1 , chipselect_out and irq_in are not shared.
Figure 3–1. Shared Pin Types
data_out data
data_in
data_outen
Altera FPGA
Bidirectional Pin
reset_out reset
Altera FPGA
Tri-State Output Pin
reset_outen
write_out write
Altera FPGA
Output Pin
busy_in busy
Altera FPGA
Input Pin
write_outen