Altera Avalon Tri-State Conduit Components - Manual (Page 6)

1–2 Chapter 1: Avalon Tri-State Conduit Components
Avalon Tri-State Conduit Components User Guide May 2011 Altera Corporation
Preliminary
In Figure 1–1 two instances of the Generic Tri-State Controller are customized to
control off-chip SSRAM and flash memories. The Avalon Tri-state Conduit
(Avalon-TC) master interfaces of these components connect to separate Avalon-TC
slave interfaces of the Tri-State Conduit Pin Sharer. The Tri-State Conduit Pin Sharer
arbitrates between the connected masters and drives signals from the selected master
on its Avalon-TC interface which connects to the Avalon-TC slave interface of the
Tri-State Conduit Bridge. Finally, the Tri-State Conduit Bridge converts the on-chip
representation of the signals to bidirectional signals. It drives the bidirectional signals
over its Avalon Conduit Interface to SSRAM and flash devices on the PCB.
Figure 1–2
shows this system in Qsys with the addition of a Nios II processor that drives the
Avalon-MM slave interfaces of the customized controllers.
This user guide explains how to use the Generic Tri-State Controller and Tri-State
Conduit Pin Sharer to create systems that interface to off-chip devices. It does not
include a separate chapter for the Tri-State Conduit Bridge because the sole purpose
of this device is to convert between the on-chip and off-chip representation of
connected signals. After reading this user guide, you should be able to define
controllers that interface with off-chip devices and identify signals that can be shared
between interfaces to reduce the total pin count of your FPGA. This document
includes the following chapters:
■ Generic Tri-State Controller
■ Tri-State Conduit Pin Sharer
Figure 1–2. Qsys Tri-State Conduit System