Document Outline

• Arria V GX FPGA Development Kit User Guide
  • Contents
  • 1. About This Kit
    • Kit Features
      • Hardware
      • Software
        • Quartus II Software
        • Arria V GX FPGA Development Kit Installer
  • 2. Getting Started
    • Before You Begin
      • Inspect the Boards
    • References
  • 3. Software Installation
    • Installing the Quartus II Subscription Edition Software
      • Licensing Considerations
    • Installing the Arria V GX FPGA Development Kit
    • Installing the USB-Blaster II Driver
  • 4. Development Board Setup
    • Setting Up the Board
    • Factory Default Switch and Jumper Settings
  • 5. Board Update Portal
    • Connecting to the Board Update Portal Web Page
    • Using the Board Update Portal to Update User Designs
  • 6. Board Test System
    • Preparing the Board
    • Running the Board Test System
    • Using the Board Test System
      • The Configure Menu
      • The System Info Tab
        • Board Information
        • MAX II Registers
        • JTAG Chain
        • Qsys Memory Map
      • The GPIO dev 1 Tab
        • Character LCD
        • User DIP Switch
        • User LEDs
        • Push Button Switches
      • The Flash Tab
        • Read
        • Write
        • Random Test
        • CFI Query
        • Increment Test
        • Reset
        • Erase
        • Flash Memory Map
      • The HSMA Tab
        • Status
        • Port
        • PMA Setting
        • Data Type
        • Error Control
        • Start
        • Stop
        • Loopback
      • The SFP/SMA/C2C Tab
        • Status
        • Port
        • PMA Setting
        • Data Type
        • Error Control
        • Start
        • Stop
        • Loopback
      • The HSMB/FMC Tab
        • Status
        • Port
        • PMA Setting
        • Data Type
        • Error Control
        • Start
        • Stop
        • Loopback
      • The SDI/Bullseye Tab
        • Status
        • Port
        • PMA Setting
        • Data Type
        • Error Control
        • Start
        • Stop
        • Loopback
      • The SMA Tab
        • Status
        • Port
        • PMA Setting
        • Data Type
        • Error Control
        • Start
        • Stop
        • Loopback
    • The Power Monitor
      • General Information
      • Power Information
      • Power Graph
      • Graph Settings
      • Reset
      • Calculating Power
    • The Clock Control
      • Registers
      • Frequency (MHz)
      • Disable
      • Default
      • Set New Frequency
    • Configuring the FPGA Using the Quartus II Programmer
    • Samtec High-speed Bull’s Eye Connector
  • A. Programming the Flash Memory Device
    • CFI Flash Memory Map
    • Preparing Design Files for Flash Programming
      • Creating Flash Files Using the Nios II EDS
    • Programming Flash Memory Using the Board Update Portal
    • Programming Flash Memory Using the Nios II EDS
    • Restoring the Flash Device to the Factory Settings
    • Restoring the MAX II CPLD to the Factory Settings
  • Additional Information
    • Document Revision History
    • How to Contact Altera
    • Typographic Conventions