A. constraints, Introduction, Constraint design with timequest timing analyzer – Altera ASI MegaCore Function User Manual

Page 22: Appendix a. constraints

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January 2014

Altera Corporation

Asynchronous Serial Interface (ASI) MegaCore Function User Guide

A. Constraints

Introduction

For the ASI MegaCore function to work reliably, you must implement the following
Quartus II constraints:

Specify clock characteristics

Set timing exceptions such as false path, minimum delay and maximum delay

Minimize the timing skew among the paths from I/O pins to the four sampling
registers

Set the oversampling clock that is used by the oversampling interface to 135 MHz
as an independent clock domain

Constraint Design With TimeQuest Timing Analyzer

To ensure your design meets timing and other requirements, you must constrain the
design. This section provides the necessary steps to properly constrain your ASI
design using TimeQuest timing analyzer.

1. Set up the Quartus II TimeQuest timing analyzer.

a. To specify the Quartus II TimeQuest timing analyzer as the default timing

analyzer, on the Assignments menu, click Settings.

b. In the Settings dialog box, under the Category list, select Timing Analysis

Settings

.

c. Turn on Use TimeQuest Timing Analyzer during compilation option, and

click OK.

2. Perform initial compilation to create an initial design database before you specify

timing constraints for your design. On the Processing menu, click Start
Compilation

.

3. Run the Quartus II TimeQuest timing analyzer. On the Tools menu, click

TimeQuest Timing Analyzer

.

4. Create timing netlist based on the fully annotated database from the post-fit

results, after you perform a full compilation. Double-click Create Timing Netlist
in the Tasks pane.

5. Write SDC constraint file. The Quartus II software does not automatically update

.sdc

files. You must explicitly write new or update constraints in the TimeQuest

timing analyzer. On the Constraints menu, click Write SDC File to write your
constraints to an .sdc file.

6. Specify timing constraints and exceptions. To enter your timing requirements, you

can use constraint entry dialog boxes or edit the previously created .sdc file.

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