External interface custom instructions, External interface custom instructions –10 – Altera Nios II Custom User Manual

Page 14

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1–10

Chapter 1: Nios II Custom Instruction Overview

Custom Instruction Types

Nios II Custom Instruction User Guide

January 2011

Altera Corporation

When

writerc

is deasserted, the Nios II processor ignores the value driven on the

result

port. The accumulated value is stored in an internal register. Alternatively, the

processor can read the value on the

result

port by asserting

writerc

. At the same

time, the internal register is cleared so that it is ready for a new round of multiply and
accumulate operations.

The

readra

,

readrb

,

writerc

,

a

,

b

, and

c

ports behave similarly to

dataa

. When the

custom instruction begins, the processor presents the new values of the

readra

,

readrb

,

writerc

,

a

,

b

, and

c

ports on the rising edge of the processor clock. All six of

these ports remain stable during execution of the custom instructions.

To determine how to handle the register file, custom instruction logic reads the active
high

readra

,

readrb

, and

writerc

ports. The logic uses the

a

,

b

, and

c

ports as register

file indexes. When

readra

or

readrb

is asserted, the custom instruction logic ignores

the corresponding

a

or

b

port, and receives data from the

dataa

or

datab

port. When

writerc

is asserted, the custom instruction logic ignores the

c

port and writes to the

result

port.

All other custom instruction port operations behave the same as for combinational
and multicycle custom instructions.

External Interface Custom Instructions

Nios II custom instructions allow you to add an interface to communicate with logic
outside of the processor’s datapath. At system generation, conduits propagate out to
the top level of the SOPC Builder or Qsys system, where external logic can access the
signals.

By enabling custom instruction logic to access memory external to the processor,
external interface custom instructions extend the capabilities of the custom instruction
logic.

Figure 1–9

shows a multicycle custom instruction that has an external memory

interface.

Figure 1–9. Custom Instructions Allow the Addition of an External Interface

dataa[31..0]
datab[31..0]

clk
clk_en

reset

start

Conduit Interface

done

result[31..0]

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