Altera Nios Development Board - Manual (Page 9)

Altera Corporation 1–1
September 2004
Board Components
Features ■ A Stratix TM EP1S10F780C6 device
■ 8 Mbytes of flash memory
■ 1 Mbyte of static RAM
■ 16 Mbytes of SDRAM
■ On board logic for configuring the Stratix device from flash memory
■ On-board Ethernet MAC/PHY device
■ Two 5-V-tolerant expansion/prototype headers each with access to
41 Stratix user I/O pins
■ CompactFlash TM connector header for Type I CompactFlash (CF)
cards
■ Mictor connector for hardware and software debug
■ Two RS-232 DB9 serial ports
■ Four push-button switches connected to Stratix user I/O pins
■ Eight LEDs connected to Stratix user I/O pins
■ Dual 7-segment LED display
■ JTAG connectors to Altera ® devices via Altera download cables
■ 50 MHz oscillator and zero-skew clock distribution circuitry
■ Power-on reset circuitry
General
Description The Nios development board, Stratix Edition, provides a hardware
platform for developing embedded systems based on Altera Stratix
devices. The Nios development board, features a Stratix EP1S10F780C6
device with 10,570 logic elements (LEs) and 920, 448 bits of on-chip
memory.
The Nios development board comes pre-programmed with a Nios II
processor reference design. Hardware designers can use the reference
design as an example of how to use the features of the Nios development
board. Software designers can use the pre-programmed Nios II processor
design on the board to begin prototyping software immediately.
This document describes the hardware features of the Nios development
board, including detailed pin-out information, to enable designers to
create custom FPGA designs that interface with all components on the
board.
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See the Nios II Development Kit, Getting Started User Guide for instructions
on setting up the Nios development board and installing Nios II
development tools.