Zilog Z08470 - Manual (Page 306)

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UM008101-0601 Serial Input/Output
286
Sync Modes 0 and 1 (D4 and D5)
These bits select various options for character synchronization.
Figure 118. Write Register 4
Clock Rate 0 and 1 (D6 and D7)
These bits specify the multiplier between the clock (TxC and RxC) and data
rates. For synchronous modes, the x1 clock rate must be specified. Any rate
may be specified for asynchronous modes; however, the same rate must be
Table 24. Sync Modes
Sync Mode 1 Sync Mode 0 Result
0 0 8-bit programmed sync
0 1 16-bit programmed sync
1 0 SDLC mode (0111 1110 flag pattern)
1 1 External Sync mode
Parity Enable
Parity Even/Odd
D7 D6 D5 D4 D3 D2 D1 D0
0 0
0 1
1 0
1 1
SYNC Modes Enable
1 Stop Bit/Character
1-1/2 Stop Bits/Character
2 Stop Bits/Character
0 0
0 1
1 0
1 1
8-Bit SYNC Character
16-Bit SYNC Character
SDLC Mode (0111 1110 Flag)
External SYNC Mode
0 0
0 1
1 0
1 1
X1 Clock Mode
X16 Clock Mode
X32 Clock Mode
X64 Clock Mode