DFI Q7-100 - Manual (Page 28)

www.dfi .com Chapter 2 Hardware Installation
28
Chapter 2
LPC connector
The Low Pin Count Interface was defined by Intel ® Corporation to facilitate the industry’s tran-
sition towards legacy free systems. It allows the integration of low-bandwidth legacy I/O com-
ponents within the system, which are typically provided by a Super I/O controller. Furthermore,
it can be used to interface firmware hubs, Trusted Platform Module (TPM) devices and embed-
ded controller solutions. Data transfer on the LPC bus is implemented over a 4 bit serialized
data interface, which uses a 33MHz LPC bus clock. For more information about LPC bus refer
to the Intel ® Low Pin Count Interface Specification Revision 1.1’.
CLK
10 2
9 1
LAD1
RST#
LAD0
FRAME#
VCC3
LAD3
GND
LAD2
SD/MMC Slot
This expansion port is used to insert a Secure Digital Input/Output (SDIO) or Multimedia Card
(MMC) device. Aside from storing data files, an SDIO card is also capable of storing powerful
software applications.
SD/MMC Slot