Foxconn 6627MA-RS2H - Manual (Page 34)

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Chapter 3 BIOS Description
DRAM Clock/Timing Control Menu
v DDR2 CAS Latency
When DDR2 synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing.
v DRAM Timing control
Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect)
EEPROM on the DRAM module. Setting to “Auto” enables DRAM timings to be
determined by BIOS based on the configurations on the SPD. Selecting
“Manual” allows users to configure the DRAM timings manually. The setting
values are: Auto, Manual.
Note: The following options can be activated and configured only when this
option is set as “Manual”.
v RAS to CAS Delay (tRCD)
It is used to set the delay time between RAS (Row Address Strobe) and CAS
(Column Address Strobe) signals.
v Precharge Time (tRP)
It is used to set the precharge time of RAS.
v RAS to Active Time (tRCD)
It is used to set the RAS to active time.
v Write Recovery Time (tWR)
It is used to set the write recovery time.
v DDR2 Additive Latency (tAL)
It is used to set the DDR2 Additive Latency time.
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