Global bus, Constraints file signals names, Figure 6: global bus constraints file signal names – Sundance SMT387 User Manual

Page 22: Table 3: rsl speed vs. fpga speed grade, Gbus rw1n

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Version 1.0.3

Page 22 of 42

SMT387 User Manual

Speed grade

-7

-6

-5

RSL speed (Gbps)

3.125

3.125

2.0

Table 3: RSL Speed vs. FPGA Speed Grade

Based on the above, the 4 bi-directional links of SMT387 can provide a combined
bandwidth of up to 12.5Gbps.

The RSL connector is J3. (See

Figure 10: SMT387 Components placement-Top view)


Refer to the latest

SUNDANCE RSL specification

for technical information on how it

works.

Global bus
The global bus is compatible with the TIM standard.
The Global Bus Interface is a memory Interface that follows Texas Instruments’
TMS320C4x External Bus operation standard. Additional information on the standard
is available in the

TMS320C4x User’s Guide

chapter 9:

External Bus operation.
When Writing, the FPGA sends data across the global bus to the external device.
When Reading, the external device writes data across the global bus to the FPGA.

Constraints File Signals Names

GBUS RW1N

Global Bus

signal

Active level:

N = Active low

STATn(3:0) are also global

Bus signals











Figure 6: Global Bus constraints file signal names.

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