Sundance SMT387 - Manual (Page 5)

Version 1.0.3 Page 5 of 42 SMT387 User Manual
Further details ....................................................................................................... 33
Verification Procedures ......................................................................................... 34
Review Procedures ................................................................................................ 34
Validation Procedures............................................................................................ 34
FPGA Constraint File General Information........................................................... 34
Ordering Information.............................................................................................. 34
Basic ..................................................................................................................... 34
Custom.................................................................................................................. 35
FPGA................................................................................................................. 35
Memories........................................................................................................... 35
SHBs ................................................................................................................. 35
Comports........................................................................................................... 35
Global Bus......................................................................................................... 35
External Clock ................................................................................................... 35
PCB Layout Details ................................................................................................ 36
Components placement ........................................................................................ 36
Headers Pinout ....................................................................................................... 38
SHB Header.......................................................................................................... 38
SHB Pinout (LVTTL only).(J2) ........................................................................... 39
JTAG/Multilinx headers ......................................................................................... 40
JTAG Boundary scan/User defined jumpers pinout (JP1/JP2) .......................... 40
Safety....................................................................................................................... 42
EMC ......................................................................................................................... 42