Sundance SMT365 - Manual (Page 2)

Version 2.3 Page 2 of 28 SMT365 User Manual
Revision History
Date Comments Engineer Version
18/7/02 First rev, based on 361 GP 1.0.0
06/01/03 User manual updated, 2 SHBs YC 1.0.1
16/1/03 Revised board layout, control registers, paging GP 1.0.2
20/1/03 Added FPGA pin-out GP 1.0.3
27/01/03 Updated interrupt registers, global status register JPA 1.0.4
30/01/03 Corrected CPLD header pin-out. GP 1.0.5
14/03/03 Added location of SDBs on the board JPA 1.0.6
11/04/03 Corrected I/O connector block pin-out GP 1.0.7
08/05/03 Added link to General firmware specification, SHB and
SDB specification, added fpga pinout convention JPA 1.0.8
19/08/03 Page 30: NSDRAMCS mapped on emif_ctrl<5>
Updated Reprogramming chapter
JPA 1.0.9
20/10/03 Added information about SHB-Word (SHB32x) firmware
version. JPA 1.1.0
01/12/03 SHB-Word (SHB32x) firmware version available for both
SMT365-1 and –2 modules
SDL interface availability
FPGA space availability
JPA 1.1.1
11/03/04 Updated Flash section
Added board’s weight
JPA 1.1.2
04/05/04 Corrected figure 1 (Flash logical sections).
Updated EMIFB CE3 space control register value.
Updated EMIFA CE1 address range.
Updated FPGA space availability section.
JPA 1.1.3
25/10/04 Create the FPGA configuration section SM 1.1.4
04/08/05 Update: the user manual supports the new firmware
implementation SM 2.0
13/12/05 Details added on EMIF registers settings JV 2.1
15/02/06 Changed GEL file contents. GP 2.2
09/05/06 Minor changes SM 2.3