Document Outline

• Maxtor D540X-4K 20.4/40.0/60.0/80.0 GB AT
• Product Manual
• Table of Contents
• List of Figures
• List of Tables
• Chapter 1 ABOUT THIS MANUAL
  • 1.1 AUDIENCE
  • 1.2 MANUAL ORGANIZATION
  • 1.3 TERMINOLOGY AND CONVENTIONS
  • 1.4 REFERENCES
• Chapter 2 GENERAL DESCRIPTION
  • 2.1 PRODUCT OVERVIEW
  • 2.2 KEY FEATURES
  • 2.3 Regulatory Compliance Standards
  • 2.4 HARDWARE REQUIREMENTS
• Chapter 3 INSTALLATION
  • 3.1 SPACE REQUIREMENTS
    • Figure 3-1 Mechanical Dimensions of Maxtor D540X-4K Hard Disk Drive
  • 3.2 UNPACKING INSTRUCTIONS
    • Figure 3-2 Drive Packing Assembly
    • Figure 3-3 Drive Packing Assembly of a Polypropylene 20-Pack Container
  • 3.3 HARDWARE OPTIONS
    • Figure 3-4 Jumper Locations for the Maxtor D540X-4K Hard Disk Drive
    • Figure 3-5 Jumper Locations on the Interface Connector
    • Table 3-1 AT Jumper Options
    • 3.3.1 Cable Select (CS) Jumper
    • 3.3.2 Drive Select (DS) Jumper
    • 3.3.3 Master Jumper configuration
    • 3.3.4 Jumper Parking (PK) Position
    • 3.3.5 Alternate Capacity (AC)
      • Figure 3-6 AT Connector and Jumper Location
  • 3.4 ATA BUS ADAPTER
    • 3.4.1 40-Pin ATA Bus Connector
    • 3.4.2 Adapter Board
  • 3.5 MOUNTING THE DRIVE ON PERSONAL COMPUTERS
    • 3.5.1 Orientation
      • Figure 3-7 Mounting Dimensions for the Maxtor D540X-4K Hard Disk Drives
      • Figure 3-8 Mounting Screw Clearance for the Maxtor D540X-4K Hard Disk Drives
    • 3.5.2 Clearance
    • 3.5.3 Ventilation
  • 3.6 COMBINATION CONNECTOR (J1)
    • Figure 3-9 J1 DC Power and ATA Bus Combination Connector
    • 3.6.1 DC Power (J1, Section A)
      • Table 3-2 J1 Power Connector, Section A
    • 3.6.2 External Drive Activity LED
    • 3.6.3 ATA Bus Interface Connector (J1, Section C)
  • 3.7 FOR SYSTEMS WITH A MOTHERBOARD ATA ADAPTER
  • 3.8 FOR SYSTEMS WITH AN ATA ADAPTER BOARD
    • 3.8.1 Adapter Board Installation
      • 3.8.1.1 Connecting the Adapter Board and the Drive
        • Figure 3-10 Drive Power Supply and ATA Bus Interface Cables
        • Figure 3-11 Completing the Drive Installation
  • 3.9 TECHNIQUES IN DRIVE CONFIGURATION
    • 3.9.1 The 528-Megabytes Barrier
    • 3.9.2 The 8.4-Gigabytes Barrier
    • 3.9.3 Operating system limitations
  • 3.10 SYSTEM STARTUP AND OPERATION
    • Table 3-3 Logical Addressing Format
• Chapter 4 SPECIFICATIONS
  • 4.1 SPECIFICATION SUMMARY
    • Table 4-1 Specifications
  • 4.2 FORMATTED CAPACITY
    • Table 4-2 Formatted Capacity
  • 4.3 DATA TRANSFER RATES
  • 4.4 TIMING SPECIFICATIONS
    • Table 4-3 Timing Specifications
  • 4.5 POWER
    • 4.5.1 Power Sequencing
    • 4.5.2 Power Reset Limits
      • Table 4-4 Power Reset Limits
    • 4.5.3 Power Requirements
      • Table 4-5 Typical Power and Current Consumption
  • 4.6 ACOUSTICS
    • Table 4-6 Acoustical Characteristics—Sound Power
  • 4.7 MECHANICAL
  • 4.8 ENVIRONMENTAL CONDITIONS
    • Table 4-7 Environmental Specifications
  • 4.9 SHOCK AND VIBRATION
    • Table 4-8 Shock and Vibration Specifications
  • 4.10 HANDLING the DRIVE
  • 4.11 RELIABILITY
  • 4.12 ELECTROMAGNETIC SUSCEPTIBILITY
  • 4.13 SPINDLE IMBALANCE
  • 4.14 DISK ERRORS
    • Table 4-9 Error Rates
• Chapter 5 BASIC PRINCIPLES OF OPERATION
  • 5.1 MAXTOR D540X-4K DRIVE MECHANISM
    • Figure 5-1 Maxtor D540X-4K AT Hard Disk Drive Exploded View
    • 5.1.1 Base Casting Assembly
    • 5.1.2 DC Motor Assembly
    • 5.1.3 Disk Stack Assemblies
      • Table 5-1 Cylinder Contents
    • 5.1.4 Headstack Assembly
    • 5.1.5 Rotary Positioner Assembly
    • 5.1.6 Automatic Actuator Lock
    • 5.1.7 Air Filtration
  • 5.2 DRIVE ELECTRONICS
    • Figure 5-2 Maxtor D540X-4K AT Hard Disk Drive Block Diagram
    • 5.2.1 µProcessor
    • 5.2.2 Digital Synchronous Spoke
    • 5.2.3 Error Correction Code (ECC) Control
    • 5.2.4 Formatter
    • 5.2.5 Buffer Controller
    • 5.2.6 Servo Processor
    • 5.2.7 Read/Write Interface
    • 5.2.8 ATA Interface Controller
    • 5.2.9 Motor Controller
  • 5.3 Read/Write ASIC
    • 5.3.1 Pre-Compensator
    • 5.3.2 Variable Gain Amplifier (VGA)
    • 5.3.3 Butterworth Filter
    • 5.3.4 FIR (Finite Impulse Response) Filter
    • 5.3.5 Flash A/D Converter
    • 5.3.6 Viterbi Detector
    • 5.3.7 ENDEC
    • 5.3.8 Servo Processor
    • 5.3.9 Clock Synthesizer
    • 5.3.10 PLL
    • 5.3.11 Serial Interface
    • 5.3.12 TA Detection and Correction
    • 5.3.13 PreAmplifier and Write Driver
  • 5.4 FIRMWARE FEATURES
    • 5.4.1 Disk Caching
      • 5.4.1.1 Adaptive Caching
      • 5.4.1.2 Read Cache
      • 5.4.1.3 Write Cache
      • 5.4.1.4 Performance Benefits
    • 5.4.2 Head and Cylinder Skewing
      • 5.4.2.1 Head Skewing
      • 5.4.2.2 Cylinder Skewing
      • 5.4.2.3 Skewing with ID-less
      • 5.4.2.4 Skew Offsets
        • Table 5-2 Skew Offsets
      • 5.4.2.5 Runtime Calculation
    • 5.4.3 Error Detection and Correction
      • 5.4.3.1 ECC Error Handling
      • 5.4.3.2 Defect Management
    • 5.1.1 Base Casting Assembly
    • 5.1.2 DC Motor Assembly
    • 5.1.3 Disk Stack Assemblies
      • Table 5-1 Cylinder Contents
• Chapter 6 ATA BUS INTERFACE AND ATA COMMANDS
  • 6.1 INTRODUCTION
  • 6.2 MECHANICAL INTERFACE
    • 6.2.1 Signal Cable and Connector
  • 6.3 ELECTRICAL INTERFACE
    • 6.3.1 ATA Bus Interface
      • 6.3.1.1 Electrical Characteristics
  • 6.4 REGISTER ADDRESS DECODING
  • 6.5 COMMAND INTERFACE
    • 6.5.1 General Feature Set
    • 6.5.2 Multiword DMA
    • 6.5.3 Ultra DMA Feature Set
    • 6.5.4 Power Management Feature Set
    • 6.5.5 Security Mode Feature Set
    • 6.5.6 Self-monitoring, Analysis, and Reporting (SMART) Feature Set
    • 6.5.7 Host Protected Area Feature Set
    • 6.5.8 Automatic Acoustic Management Feature Set
    • 6.5.9 IDENTIFY DEVICE Information
      • Table 6-1 Identify Device Parameters
    • 6.5.10 SET FEATURES Supported Commands
      • Table 6-2 Supported Features
    • 6.5.11 Maxtor Specific Commands
      • 6.5.11.1 READ DEFECT LIST
        • Table 6-3 READ DEFECT LIST LENGTH Command Bytes
        • Table 6-4 READ DEFECT LIST Command Bytes
        • Table 6-5 DEFECT LIST DATA FORMAT
        • Table 6-6 DEFECT ENTRY DATA FORMAT
      • 6.5.11.2 READ CONFIGURATION
        • Table 6-7 Accessing the READ CONFIGURATION Command
      • 6.5.11.3 SET CONFIGURATION
        • Table 6-8 Accessing the SET CONFIGURATION Command
      • 6.5.11.4 SET CONFIGURATION WITHOUT SAVING TO DISK
        • Table 6-9 Accessing the SET CONFIGURATION WITHOUT SAVING TO DISK Command
        • Table 6-10 Configuration Command Format
    • 6.5.12 SMART READ ATTRIBUTE THRESHOLDS
      • Table 6-11 Device Attribute Thresholds Data Structure
      • Table 6-12 Individual Threshold Data Structure
      • Table 6-13 Device SMART Data Structure
      • 6.5.12.1 SMART RETURN STATUS
      • 6.5.12.2 SMART SAVE ATTRIBUTE VALUES
    • 6.5.13 Device Configuration Overlay Feature Set
• INDEX
• actuator lock 5-5
• adapter board 2-4, 3-13
• Adaptive Caching 5-10
• Adaptive segmentation 5-10
• air filtration 5-6
• AIRLOCK® 5-5
• ARR (automatic read reallocation) 6-14
• AWRE (automatic write reallocation enabled) 6-14
• base casting 5-3
• block diagram 5-6
• Buffer Controller 5-8
• Cable Select 3-6
• cable select (CS) jumper 3-5
• CE (cache enable) 6-14
• clean room 5-1
• clearance 3-11
• command descriptions 6-2
• Configuration 6-10
• configuration command data field 6-13
• connector, IDE 3-12
• cooling fan requirements 3-11
• crash stops 5-5
• daisy-chain 2-3
• daisy-chained 3-5
• Data Synchronizer 5-9
• Data transfer operations 5-8
• DATA TRANSFER RATE 4-4
• Data transfer Rates 4-2
• DC motor assembly 5-3
• DCR (disable early correction) 6-14
• DisCache parameters 6-13
• DISK ERRORS 4-2, 4-3
• disk stack assembly 5-3
• DOS 4-4
• DP8491 Read Channel Device 5-8
• drive electronics 5-6
• drive mechanism 5-1
• drive parameters 6-15
• drive select (DS) jumper 3-6
• ECC correction span 6-14
• EEC (enable early correction) 6-14
• ENDEC 5-7
• error detection, correction 5-14
• error rates 5-14
• error recovery parameters 6-14
• faceplate 3-1
• firmware features 5-10
• flex circuit. 5-5
• floppy drive 3-13
• hardware options 3-4
• headstack assembly 5-5
• Humidity 4-9
• IDE 2-4, 3-8
• IDE interface controller 5-8
• IDE-bus interface 6-1
• IDE-bus interface connector 3-12
• Idle 4-7
• input power connections 3-12
• interface, IDE-bus 6-1
• jumper configurations 3-5
• jumper locations 3-4
• jumper options 3-5
• landing zone 5-5
• logical cylinders 3-18
• logical heads 3-18
• logical sectors/track 3-18
• low 4-4
• low-level format 4-4
• maximum screw torque 3-10
• mechanical dimensions 3-1
• microcontroller 5-7
• motherboard 3-13
• Motor Controller 5-8
• mounting 3-9
• mounting dimensions 3-9
• mounting holes 3-9
• mounting screw clearance 3-10
• mounting screws 3-10
• MS-DOS 3-18
• MTBF 4-11
• noise 4-6
• Nominal conditions 4-5
• number of retries 6-14
• packing assembly 3-2
• packing materials 3-2
• PE (prefetch enable) 6-13
• Peak Detect 5-9
• PM 4-11
• power and AT bus connector 3-11
• power and bus interface cables 3-14
• power connector 3-11
• Power Requirements 4-7
• Power Sequencing 4-6
• pre-amplifier 5-10
• pre-compensator 5-9
• precompensator circuit 5-7
• printed circuit board 3-4
• Pulse Detector 5-9
• PWM 5-7
• Quantum configuration key 6-13
• R/W head matrix 5-10
• RC (read continuous) 6-14
• read configuration 6-11
• read defect list 6-8
• read preamplifier 5-5
• read/write ASIC 5-10
• Reset Limits 4-6
• ripple 4-6
• rotary positioner 5-5
• rotary positioner assembly 5-5
• RUEE (reallocate uncorrectable error enables) 6-15
• Servo Controller 5-8
• set configuration 6-12
• set configuration without saving to disk 6- 12
• shipping container 3-2
• SHOCK 4-10
• Slave Present 3-6
• slave present (SP) jumper 3-6
• Specifications 4-10
• sputtered thin-film coating 5-3
• supply voltages 4-5
• tampering with the HDA 5-1
• temperature 4-5
• theory of operation 5-1
• timebase generator 5-9
• UNIX 4-4
• ventilation 3-11
• ventilation requirements 3-9
• vibration 4-5
• warranty (void) 5-1
• WCE (write cache enable) 6-15
• write driver 5-5, 5-10