4 terminating an ultra dma data in burst – FUJITSU MHD2032AT User Manual
Page 153
Interface
5-82
C141-E050-02EN
3)
The device shall resume an Ultra DMA burst by generating a DSTROBE
edge.
b)
Host pausing an Ultra DMA data in burst
1)
The host shall not pause an Ultra DMA burst until at least one data word
of an Ultra DMA burst has been transferred.
2)
The host shall pause an Ultra DMA burst by negating HDMARDY-.
3)
The device shall stop generating DSTROBE edges within t
RFS
of the host
negating HDMARDY-.
4)
If the host negates HDMARDY- within t
SR
after the device has generated
a DSTROBE edge, then the host shall be prepared to receive zero or one
additional data words. If the host negates HDMARDY- greater than t
SR
after the device has generated a DSTROBE edge, then the host shall be
prepared to receive zero, one or two additional data words. The
additional data words are a result of cable round trip delay and t
RFS
timing
for the device.
5)
The host shall resume an Ultra DMA burst by asserting HDMARDY-.
5.5.3.4 Terminating an Ultra DMA data in burst
a)
Device terminating an Ultra DMA data in burst
The following steps shall occur in the order they are listed unless otherwise
specifically allowed (see 5.6.4.5 and 5.6.4.2 for specific timing
requirements):
1)
The device shall initiate termination of an Ultra DMA burst by not
generating DSTROBE edges.
2)
The device shall negate DMARQ no sooner than t
SS
after generating the
last DSTROBE edge. The device shall not assert DMARQ again until
after the Ultra DMA burst is terminated.
3)
The device shall release DD (15:0) no later than t
AZ
after negating
DMARQ.
4)
The host shall assert STOP within t
LI
after the device has negated
DMARQ. The host shall not negate STOP again until after the Ultra
DMA burst is terminated.
5)
The host shall negate HDMARDY- within t
LI
after the device has negated
DMARQ. The host shall continue to negate HDMARDY- until the Ultra
DMA burst is terminated. Steps (4) and (5) may occur at the same time.
6)
The host shall drive DD (15:0) no sooner than t
ZAH
after the device has
negated DMARQ. For this step, the host may first drive DD (15:0) with
the result of its CRC calculation (see 5.5.5):