Intel 82540EP - Manual (Page 31)

Networking Silicon — 82540EP
Datasheet 25
NOTE:
Note: 50 pF load used for maximum times. Minimum times are specified with 0 pF load.
Figure 6. TVAL (max) Falling Edge Test Load
10 pF
25
Ω
Pin
Test
Point
1/2 inch max.
V
CC
Figure 7. TVAL (min) Test Load
1k Ω
Pin
Test
Point
1/2 inch max.
V
CC
10 pF
1k Ω
Figure 8. TVAL Test Load (PCI 5 V Signaling Environment)
50 pF
Pin
Test
Point
1/2 inch max.