Intel 82555 - Manual (Page 29)

Datasheet 25
Networking Silicon — 82555
6.0 Repeater Mode
The 82555 has a compete set of repeater features making it the ideal PHY for Class 1 (MII)
repeater designs. The 82555 works in repeater mode when the RPT signal (pin 50) is high. The
FRC100 signal (pin 51) determines which type of repeater is supported, either 100BASE-TX or
10BASE-T.
6.1 Special Repeater Features
Special features of the 82555 repeater mode operation include:
• Fully IEEE compliant with automatic carrier disconnect.
The 82555 will disconnect when it receives false carrier detects. Either a long series of valid
idle symbols or a valid “JK” pair will cause it to reconnect.
• Narrow 14 mm analog side that enables tight packing of multiple PHYs, which is ideal for 8,
12, 18, 24, or even 32 port repeater designs.
• Very low emissions and high noise immunity.
• 32 configurable addresses through five address lines.
• Auto-Negotiation disable function.
In repeater mode, the Auto-Negotiation function is not used for configuration purposes. When
Auto-Negotiation is enabled in repeater mode, the MII management will be able to obtain data
from the MDI Auto-Negotiation register about the remote partner. This is a feature for hub
management allowing a 10/100 Mbps repeater design to automatically detect whether or not it
can operate at 100 Mbps. If the ANDIS signal is de-asserted, the Auto-Negotiation feature will
be disabled.
• Forced 10 Mbps or 100 Mbps operation (allows for a 10/100 repeater design).
• Receive port enable function.
The PORTEN signal is a glueless interface to the Repeater Interface Controller (RIC). When
the PORTEN signal is low, all receive signals are tri-stated, except CRS and COL.
• 26-bit PHY budget for round trip.
The total PHY bit budget is 8 bits from the MII to the wire and 18 bits from the wire to the
MII.
• Static 2.5 MHz (10BASE-T) or 25 MHz (100BASE-TX) clock input for repeater designs
(issued by RIC).
The 82555 clock source is fixed between Resets. There is one input, either 2.5 MHz or 25
MHz, as indicated by the level at the FRC100 pin. All clocks have a common source
generation so the that PPM is 0 between them (X1, 2.5 MHz and 25 MHz).
• DTE (adapter) features not available in repeater mode: full duplex, flow control, and the
combination Auto-Negotiation interface for T4.
6.2 Connectivity
A 25 MHz buffered oscillator can provide the clock to all of the 82555 devices. A 2.5 MHz (10
Mbps) or a 25 MHz (100 Mbps) signal is required to clock the RIC and the TXC signal in the
PHYs. TXD[3:0], TXERR, RXC, RXD[3:0], RXDV, and RXERR are single-bus (shortened) for all