Sony DVS-9000-C - Manual (Page 28)

1-20
DVS-9000/9000SF
1-8. Checks on Completion of Installation
<LED>
D103, D107 (A-4) :
+ + + + +1.8 V-1 and 2
+1.8 V-1 and 2 power supply status indication.
Lit when the
+1.8 V-1 and 2 power are supplied.
D113 (A-3) : + + + + +3.3 V
+3.3 V power supply status indication.
Lit when the
+3.3 V power is supplied.
D114 (A-3) : + + + + +12 V
+12 V power supply status indication.
Lit when the
+12 V power is supplied.
If this LED does not light, the fuse may have blown.
D200 (A-11) : PLL UNLOCK status LED
Indicates lock/unlock of the PLL (Phase Locked Loop) in
the FPGA.
If this LED lit, the PLL can possibly be unlocked.
3. MY-108 board (DVS-9000/9000SF)
A side/Component side
D700 (A-10) : DLL UNLOCK status LED
Indicates lock/unlock of the DLL (Delay Locked Loop) in
the FPGA.
If this LED lit, the DLL can possibly be unlocked.
D701 (A-11) : CONFIG. ERROR status LED
Indicates the configuration error of the FPGA.
If this LED lit, the FPGA can possibly be working incor-
rectly.
D702, D703, D704 (A-10) : C2, C1 and C0 status LED
Indicates the status of CPU on the circuit board.
<Switch>
S100 (A-8) : MY-CPU reset switch
Pressing this switch initializes the CPU on the MY-108
board.
TP104
D114
TP103
D113
TP101
D104
TP102
D103
1
2
3
4
5
6
7
8
9
10
11
12
13
A B C D E F G H J K L M N P R
TP400
E100
E104
S100
S400
SL700
SL701
SL702
CN700
D702
D703
D704
D700
D200
D701
E106
CN401
E102
E103
E105
E101
TP604
TP602
TP1502
E108
E107
E109
TP202 TP204
TP203
TP200
TP201
E110
TP206 TP207
TP205
TP208
TP209