NXP Semiconductors Triple high-speed Analog-to-Digital Converter 110 Msps TDA8752B - Manual (Page 10)

Philips Semiconductors
TDA8752B
Triple high-speed Analog-to-Digital Converter 110 Msps
Product specification Rev. 03 — 21 July 2000 10 of 38
9397 750 07338 © Philips Electronics N.V. 2000. All rights reserved.
CKREFO 80 reference output clock re-synchronized horizontal pulse
CKAO 81 PLL clock output 3 (in phase with reference output clock
CKAO or CKBO)
OGND
PLL
82 PLL digital ground
CKBO 83 PLL clock output 2
CKADCO 84 PLL clock output 1 (in phase with internal ADC clock)
V
CCO(PLL)
85 PLL output power supply
DGND 86 digital ground
OE 87 output enable; active LOW (when OE is HIGH, the outputs are
in high-impedance)
PWDWN 88 power-down control input (device is in Power-down mode
when this pin is HIGH)
CLP 89 clamp pulse input (clamp active HIGH)
HSYNC 90 horizontal synchronization input pulse
INV 91 PLL clock output inverter command input (invert when HIGH)
CKEXT 92 external clock input
COAST 93 PLL coast command input
CKREF 94 PLL reference clock input
V
CCD
95 digital power supply
AGND
PLL
96 PLL analog ground
CP 97 PLL filter input
CZ 98 PLL filter input
V
CCA(PLL)
99 PLL analog power supply
n.c. 100 not connected
Table 3: Pin description …continued
Symbol Pin Description