National Instruments NI PXI-562X - Manual (Page 20)

Chapter 2 Hardware Overview
NI PXI-562x User Manual 2-6 ni.com
a free-running state, in which the acquisition clock is not synchronized to
any external reference.
The voltage controlled crystal oscillator (VCXO) is a 64 MHz clock.
The trigger and clock routing area directs clock signals and triggers.
The TIO is the timing engine used for the NI 562x.
The MITE is the PXI bus interface. The MITE provides high-speed direct
memory access (DMA) transfers from the NI 562x to the host computer
memory.
Other Features
This section contains information on other features on the NI 562x.
Multiple-Record Acquisitions
After the trigger has been received and the posttrigger samples have been
stored, you can configure the NI 562x to begin another acquisition that is
stored in another memory record on the device. This process is a
multiple-record acquisition. To perform multiple-record acquisitions,
configure the NI 562x to the number of records to be acquired before
starting the acquisition. The NI 562x acquires an additional record each
time a trigger is accepted until all the requested records are stored
in memory. After the initial setup, this process does not require software
intervention.
Between each record, a dead time exists during which the trigger is not
accepted. If the record length is greater than 80 µs, the dead time is 500 ns.
If, however, the record length is less than 80 µs, the dead time is 80 µs.
During this time, the memory controller sets up for the next record. Also,
additional dead time may exist while the minimum number of pretrigger
samples are being acquired.