National Instruments PCI-1428 - Manual (Page 22)

Chapter 3 Hardware Overview
© National Instruments Corporation 3-3 IMAQ PCI-1428 User Manual
Multiple-Tap Data Formatter
Many digital cameras transfer multiple channels, or taps, of data
simultaneously to increase the frame rate of the camera. However, the data
in each tap may not be transferred in the traditional top-left to bottom-right
direction. Also, the taps may not transfer data in similar directions.
The multiple-tap data formatting circuitry on the PCI-1428 can reorder the
data from up to four 8-bit taps. The data from each tap can be independently
scanned either from left-to-right or right-to-left and top-to-bottom or
bottom-to-top.
SDRAM
The PCI-1428 comes with 16 MB of onboard high-speed synchronous
dynamic RAM (SDRAM). The PCI-1428 uses the onboard RAM as a FIFO
buffer to ensure acquisition. Even when the data rate from the camera
exceeds PCI throughput, you can acquire without interruption until the
onboard RAM is full.
Serial Interface
Use the asynchronous serial interface on the MDR 26-pin connector to
control Camera Link cameras that also have a serial interface for camera
control and configuration.
Trigger Control and Mapping Circuitry
The trigger control and mapping circuitry routes, monitors, and drives
the external and RTSI bus trigger lines. You can configure each of these
lines to start an acquisition on a rising or falling edge. In addition, you can
drive each line asserted or unasserted, similar to a digital I/O line. You
can also map pulses from the high-speed timing circuitry or many of the
PCI-1428 status signals to these trigger lines. There are four external and
four RTSI bus triggers. You can program each of these triggers in polarity
and direction.
High-Speed Timing
The high-speed timing circuitry on the PCI-1428, built from high-speed
counters, allows you to specify or generate precise, real-time control
signals. Map the output of this circuitry to a trigger line to provide accurate
pulses and pulse trains.