Quatech MPAP-100 - Manual (Page 52)

17 Receive Pattern Count Register
The Receive Pattern Count Register is used to set the counter value to be used in receive
pattern detection. The address of this register is Base+C (hex). This register can be ignored if
the external FIFOs are not being used.
counter value (0-255)
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Table 15 --- Receive Pattern Count Register - Read/Write
Bits 7-0: Receive Pattern Count:
This value is the number of times that the character stored in the Receive Pattern
Character Register (see page 46) must be consecutively detected for the receive
character pattern detect interrupt to be generated. See page 37 for details on the
receive character pattern detection feature.