Chipscope plb46 iba parameters – Xilinx ChipScope PLB46 IBA v1.00a User Manual

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DS619 April 7, 2009

Product Specification

When these match units are enabled, all slaves or masters are enabled. You cannot individually enable a particular
master.

The match units 7, 8, and 9 are slave side signals for BUSY, READ, and WRITE error controls going to the mas-
ter. These units are broken out individually because this bus has one signal for each master on each slave. Conse-
quently, you can have up to 256 signals on each one of these match units (if PLB goes to a 16 slave, 16 master
solution).

The arbiter status signals can be monitored using match unit 10. The signals probed by this match unit can help
identify the order of the PLB master transactions that are being sorted on the bus.

ChipScope PLB46 IBA Parameters

To create a ChipScope PLB46 IBA uniquely tailored for your system and to optimize performance, specific fea-
tures can be parameterized on the PLB IBA.

Table 2

describes the features that can be parameterized.

The ChipScope PLB IBA peripheral supports multiple trigger units that connect to the PLB Control bus, Address
bus, Data bus, lumped Slave or Master busses. Each one of these trigger units can be enabled and parameterized
independently.

Table 2

lists all the parameters used in selecting the trigger port connections. These parameters

define what signals are connected to the trigger ports, the match unit type, and if the signals are stored in the sam-
ple buffer.

Table 2: IBA_PLBv46 Design Parameters

Generic

Feature/Description

Parameter Name

Allowable

Values

Default

Value

VHDL

Type

G1

Target Family

C_FAMILY

spartan3,
spartan3e,

spartan3a,
spartan3adsp,
spartan3an,

virtex4, virtex5

virtex5

String

G2

Device

C_DEVICE

String

G3

Device Package

C_PACKAGE

String

G4

Device speed grade

C_SPEEDGRADE

String

G5

Number of PLB Masters

C_PLBV46_NUM_MASTERS

1-8

2

Integer

G6

Number of PLB Slaves

C_PLBV46_NUM_SLAVES

1-8

1

Integer

G7

Number of bits required to encode
the number of PLB Masters

C_PLBV46_MID_WIDTH

1-5

2

Integer

G8

PLB Address Bus Width

C_PLBV46_AWIDTH

32

32

Integer

G9

PLB Data Bus Width

C_PLBV46_DWIDTH

32,64,128

64

Integer

IBA Storage Options and Trig Out

G10

Number of data samples captured for
every trigger match. Note that the
range of acceptable values depends

on the C_FAMILY value.

C_NUM_DATA_SAMPLES

512, 1024, 2048,
4096, 8192,
16384, 32768,

65536, 131072

1024

Integer

G11

Number of sequencer levels. If 0
then no sequencer is used.

C_MAX_SEQUENCER_
LEVELS

0-16

2

Integer

G12

1=Enable data store qualification

(filtering)
0=Disable

C_ENABLE_STORAGE_

QUALIFICATION

0,1

1

Integer

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