Rainbow Electronics AT45DQ321 - Manual (Page 12)

12 AT45DQ321 [ADVANCE DATASHEET]
DS-45DQ321-031–DFLASH–12/2012
The CS pin must remain low during the loading of the opcode, the address bytes, the dummy byte, and the reading of
data. When the end of a page in the main memory is reached during a Quad-output Read Array the device will continue
reading at the beginning of the next page with no delays incurred during the page boundary crossover (the crossover
from the end of one page to the beginning of the next page). When the last bit in the main memory array has been read,
the device will continue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the beginning of the array.
A low-to-high transition on the CS pin will terminate the read operation and tri-state the I/O
3
, I/O
2 ,
I/O
1
and I/O
0
pins. The
Quad-output Read Array bypasses both data buffers and leaves the contents of the buffers unchanged.
6. Program and Erase Commands
6.1 Buffer Write
Utilizing the Buffer Write command allows data clocked in from the SI pin to be written directly into either one of the
SRAM data buffers.
To load data into a buffer using the standard DataFlash buffer size (528 bytes), an opcode of 84h for Buffer 1 or 87h for
Buffer 2 must be clocked into the device followed by three address bytes comprised of 14 dummy bits and 10 buffer
address bits (BFA9 - BFA0). The 10 buffer address bits specify the first byte in the buffer to be written.
To load data into a buffer using the binary buffer size (512 bytes), an opcode of 84h for Buffer 1 or 87h for Buffer 2, must
be clocked into the device followed by 15 dummy bits and 9 buffer address bits (BFA8 - BFA0). The 9 buffer address bits
specify the first byte in the buffer to be written.
After the last address byte has been clocked into the device, data can then be clocked in on subsequent clock cycles. If
the end of the data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will continue to
be loaded into the buffer until a low-to-high transition is detected on the CS pin.
6.2 Dual-input Buffer Write
The Dual-input Buffer Write command is similar to the Buffer Write command and can be used to increase the data input
into one of the SRAM buffers by allowing two bits of data to be clocked into the device on every clock cycle rather than
just one.
To load data into a buffer using the standard DataFlash buffer size (528 bytes), an opcode of 24h for Buffer 1 or 27h for
Buffer 2 must be clocked into the device followed by three address bytes comprised of 14 dummy bits and 10 buffer
address bits (BFA9 - BFA0). The 10 buffer address bits specify the first byte in the buffer to be written.
To load data into a buffer using the binary buffer size (512 bytes), an opcode of 24h for Buffer 1 or 27h for Buffer 2, must
be clocked into the device followed by 15 dummy bits and 9 buffer address bits (BFA8 - BFA0). The 9 buffer address bits
specify the first byte in the buffer to be written.
After the last address byte has been clocked into the device, data can then be clocked in on subsequent clock cycles. If
the end of the data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will continue to
be loaded into the buffer until a low-to-high transition is detected on the CS pin.
6.3 Quad-input Buffer Write
The Quad-input Buffer Write command is similar to the Buffer Write command and can be used to significantly increase
the data input into one of the SRAM buffers by allowing four bits of data to be clocked into the device on every clock cycle
rather than just one.
To load data into a buffer using the standard DataFlash buffer size (528 bytes), an opcode of 44h for Buffer 1 or 47h for
Buffer 2 must be clocked into the device followed by three address bytes comprised of 14 dummy bits and 10 buffer
address bits (BFA9 - BFA0). The 10 buffer address bits specify the first byte in the buffer to be written.