Rainbow Electronics AT45DQ321 - Manual (Page 63)

63 AT45DQ321 [ADVANCE DATASHEET]
DS-45DQ321-031–DFLASH–12/2012
Figure 23-4. Quad-input Buffer Write
Figure 23-5. Buffer to Main Memory Page Program
I/O
0
(SI)
SCK
I/O
1
(SO)
I/O
2
(WP)
I/O
3
(RESET)
CS
MSB MSB
2 3 1 0
0 1 0 0 0 1 0 0
6 7 5 4 10 11 9 8 12 39 37 38 33 36 35 34 31 32 29 30
Opcode
A A A A A A A A A
D5
D4
D1
D0
Address Bits A23-A0
High-impedance
D6 D2
High-impedance
MSB MSB MSB MSB
D7 D3
D5
D4
D1
D0
D6 D2
D7 D3
D5
D4
D1
D0
D6 D2
D7 D3
D5
D4
D1
D0
D6 D2
D7 D3
D5
D4
D1
D0
D6 D2
D7 D3
MSB
High-impedance
Byte 1
IN
Byte 2
IN
Byte 3
IN
Byte 4
IN
Byte n
IN
CS
SI
(I/O 1 )
CMD X,PA12-6 PA5-0, XX X···X
Starts Self-timed Erase/Program Operation
Binary Page Size
A21-A9 + 9 Dummy Bits
Each transition represents eight bits