ALLIED Vision Technologies Prosilica GC2450 - Manual (Page 70)

Prosilica GC Technical Manual V2.0.8
70
Description of the data path
Prosilica GC750C
Figure 58: Block diagram for Prosilica GC750C
HIRO
S
E I
/O
RS2
32
Sensor
Analog Analog
ADC
10 bit
Analog Analog
Gain
Horizontal
binning*
Vertical
binning* /
Vertical ROI
10
b
it
Gigabit
Ethernet
interface
10 bit
White balance
Offset ‡
8 bit 8/10 bit
Bayer †
Interpolation
3 X 3
Frame
memory
‡
Factory calibrated. NOT a user control.
†
For on-camera interpolated PixelFormats only—outputs 8 bit.
Raw un-interpolated PixelFormats skip this block—outputs 10 bit.
Gi
g
E
10 bit
Horizontal
ROI
Camera control
*
Color information lost while binning is active.