IEI Integration KINO-PVN-D4251_D5251 - Manual (Page 20)

KINO-PVN-D5251/D4251/ Mini ITX SBC
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1.4 Data Flow
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Figure 1-6 shows the data flow between the two on-board chipsets and other components
installed on the motherboard and described in the following sections of this chapter.
Figure 1-6: Data Flow Block Diagram